M366S0924FTS Samsung, M366S0924FTS Datasheet - Page 12

• Manufacturer Part Number: M366S0924FTS
• Description: SDRAM Unbuffered Module
• Manufacturer: Samsung

M366S1723FTS(U) (16M x 64, 128MB Module)
(Recommended operating condition unless otherwise noted, T
M366S0924FTS (8M x 64, 64MB Module)
(Recommended operating condition unless otherwise noted, T
DC CHARACTERISTICS
Notes : 1. Measured with outputs open.
64MB, 128MB, 256MB Unbuffered DIMM
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
Parameter
Parameter
Symbol
Symbol
I
I
I
I
I
I
I
I
CC2
CC3
CC2
CC3
CC2
I
CC3
I
CC2
I
CC3
I
I
I
I
I
CC2
CC3
CC2
CC3
CC2
CC2
CC3
CC3
I
I
I
I
I
I
I
I
CC1
CC4
CC5
CC6
CC1
CC4
CC5
CC6
NS
NS
NS
NS
PS
PS
PS
PS
N
N
N
N
P
P
P
P
Burst length = 1
t
I
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
I
Page burst
4Banks activated
t
t
CKE ≤ 0.2V
Burst length = 1
t
I
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
I
Page burst
4Banks activated
t
t
CKE ≤ 0.2V
RC
O
O
CCD
RC
RC
O
O
CCD
RC
= 0 mA
= 0 mA
= 0 mA
= 0 mA
≥ t
≥ t
≥ t
≥ t
= 2CLKs
= 2CLKs
RC
RC
RC
RC
(min)
IL
IH
IH
IL
IH
IH
(min)
(min)
IL
IH
IH
IL
IH
IH
(min)
(max), t
(max), t
(max), t
(max), t
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
IL
IL
IL
IL
A
A
Test Condition
Test Condition
(max), t
(max), t
(max), t
(max), t
= 0 to 70°C)
CC
CC
= 0 to 70°C)
CC
CC
IH
/V
= 10ns
= 10ns
= 10ns
= 10ns
IL
IH
IH
IH
IH
=V
CC
CC
CC
CC
IL
IL
IL
IL
(min), t
(min), t
(min), t
(min), t
(max), t
(max), t
(max), t
(max), t
DDQ
=∞
=∞
=∞
=∞
/V
CC
CC
CC
CC
SSQ
CC
CC
CC
CC
= 10ns
= 10ns
= 10ns
= 10ns
=∞
=∞
=∞
=∞
)
Version
Version
1600
720
160
240
200
880
400
120
100
560
800
7A
7A
16
16
80
40
40
16
80
40
20
20
8
8
8
Rev. 1.3 May 2004
Unit
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
SDRAM
Note
Note
1
1
2
1
1
2