UCN5833 Allegro, UCN5833 Datasheet

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UCN5833

Manufacturer Part Number
UCN5833
Description
BiMOS II 32-BIT SERIAL-INPUT / LATCHED DRIVER
Manufacturer
Allegro
Datasheet

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Output Voltage, V
Logic Supply Voltage, V
Input Voltage Range,
Continuous Output Current,
Package Power Dissipation, P
Operating Temperature Range,
Storage Temperature Range,
* Derate linearly to 0 W at +150°C.
Caution: CMOS devices have input static protection
but are susceptible to damage when exposed to
extremely high static electrical charges.
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
11
10
12
3
5
6
7
8
9
2
4
V
l
(UCN5833A) . . . . . . . . . . . . . . . 3.5 W*
(UCN5833EP) . . . . . . . . . . . . . . 2.5 W*
T
T
OUT
10
11
12
14
15
16
13
17
9
A
S
7
8
IN
. . . . . . . . . . . . . .
. . . . . . . . . . . . .
. . . . . . . . .
(each output) . . . . . . . . . . 125 mA
°
OUT
SUB
. . . . . . . . . . .
-0.3 V to V
DD
. . . . . . .
-55
-20
D
°
C to +150
Dwg. No. A-13,049
°
C to +85
DD
+ 0.3 V
31
39
38
37
36
35
34
33
32
30
29
7.0 V
30 V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
°
°
31
30
29
28
27
26
25
24
23
22
21
C
C
5833
cost, the UCN5833A/EP integrated circuits offer high-speed operation
for thermal printers. These devices can also be used to drive multi-
plexed LED displays or incandescent lamps within their 125 mA peak
output current rating. The combination of bipolar and MOS technolo-
gies gives BiMOS II smart power ICs an interface flexibility beyond the
reach of standard buffers and power driver circuits.
outputs, a CMOS data latch for each of the drivers, a 32-bit CMOS
shift register, and CMOS control circuitry. The high-speed CMOS shift
registers and latches allow operation with most microprocessor-based
systems at data input rates above 3.3 MHz. Use of these drivers with
TTL may require input pull-up resistors to ensure an input logic high.
with 0.600" (15.24 mm) row spacing. At an ambient temperature of
+75°C, all outputs of the DlP-packaged device will sustain 50 mA
continuously. For high-density applications, the UCN5833EP is
available. This 44-lead plastic chip carrier (quad pack) is intended
for surface-mounting on solder lands with 0.050" (1.27 mm) centers.
CMOS serial data outputs permit cascading for applications requiring
additional drive lines.
I To 3.3 MHz Data Input Rate
I 30 V Minimum Output Breakdown
I Darlington Current-Sink Outputs
I Low-Power CMOS Logic and Latches
Always order by complete part number:
Part Number
UCN5833A
UCN5833EP
Designed to reduce logic supply current, chip size, and system
These 32-bit drivers have bipolar open-collector npn Darlington
The UCN5833A is supplied in a 40-pin dual in-line plastic package
BiMOS II 32-BIT SERIAL-INPUT,
Package
40-Pin DIP
44-Lead PLCC
LATCHED DRIVER

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UCN5833 Summary of contents

Page 1

... Logic Supply Voltage Input Voltage Range -0 0 Continuous Output Current, l (each output 125 mA OUT Package Power Dissipation (UCN5833A 3.5 W* (UCN5833EP 2.5 W* Operating Temperature Range, ° - +85 A Storage Temperature Range, ° - +150 S * Derate linearly +150°C. ...

Page 2

... IN LOGIC 21 GROUND 115 Northeast Cutoff, Box 15036 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1986, 1995, Allegro MicroSystems, Inc. 32-BIT SHIFT REGISTER LATCHES OUT OUT POWER OUT OUT OUT ...

Page 3

Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage Input Current Serial Output Voltage Supply Current Output Rise Time Output Fall Time NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin. Serial Shift ...

Page 4

BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVER CLOCK DATA IN E STROBE C OUTPUT ENABLE OUT N A. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) .......................................................................... Minimum Data Active Time After ...

Page 5

MAX 0.015 MIN 0.022 0.014 40 14.73 12. 1.77 0.77 53.2 50.3 6.35 MAX 0.39 MIN 0.558 0.356 BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVER ...

Page 6

BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVER 0.319 0.291 0.021 0.013 0.319 0.291 0.050 BSC 0.020 MIN 0.180 0.165 8.10 7.39 0.533 0.331 8.10 7.39 1.27 BSC 0.51 MIN 4.57 4. 0.032 0.026 0.695 0.685 0.656 0.650 39 ...

Page 7

... LATCHED DRIVER The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current ...

Page 8

BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVER * Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits. Negative current is defined as coming out of (sourcing) the output. † Complete part number includes ...

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