K6X4008C1F-B Samsung semiconductor, K6X4008C1F-B Datasheet
K6X4008C1F-B
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K6X4008C1F-B Summary of contents
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... K6X4008C1F Family Document Title 512Kx8 bit Low Power full CMOS Static RAM Revision History Revision No. History 0.0 Initial draft 0.1 Revised - Added Commercial Product. 1.0 Finalized - Added Lead Free 32-SOP-525 Product - Changed I from 10mA to 5mA CC - Changed I 1 from 8mA to 7mA CC - Changed I 2 from 40mA to 30mA ...
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... Low Data Retention Voltage: 2V(Min) Three state output and TTL compatible Package Type: 32-DIP-600, 32-SOP-525, 32-TSOP2-400F/R PRODUCT FAMILY Product Family Operating Temperature Vcc Range K6X4008C1F-B Commercial (0~70 C K6X4008C1F-F Industrial (-40~85 C K6X4008C1F-Q Automotive (-40~125 C 1. The parameter is measured with 50pF test load. PIN DESCRIPTION ...
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... CMOS SRAM Automotive Products(-40~125 C) Part Name Function K6X4008C1F-GQ55 32-SOP, 55ns, L K6X4008C1F-GQ70 32-SOP, 70ns, L K6X4008C1F-VQ55 32-TSOP2-F, 55ns, L K6X4008C1F-VQ70 32-TSOP2-F, 70ns, L Mode Power Deselected Standby Output disbaled Active Read Active Write Active Unit Remark K6X4008C1F-B C K6X4008C1F-F K6X4008C1F-Q Revision 1.0 September 2003 ...
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... Cycle time=1 s, 100% duty, I =0mA IO CS 0.2V Vcc-0. Cycle time=Min, 100% duty, I =0mA, CS=V IO IL, I =2.1mA OL I =-1.0mA OH CS=V , Other inputs = K6X4008C1F-B CS Vcc-0.2V, Other inputs=0~Vcc K6X4008C1F-F K6X4008C1F-Q 4 CMOS SRAM Typ Max Unit 5.0 5 Vcc+0.5 - 0.8 V Min Max ...
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... WHZ Test Condition CS Vcc-0.2V K6X4008C1F-B Vcc=3.0V, CS Vcc-0.2V K6X4008C1F-F K6X4008C1F-Q See data retention waveform 5 CMOS SRAM 1) =-40 to 125 C) A Speed Bins Units 70ns Max Min Max - ...
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... K6X4008C1F Family TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS OE High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...
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... K6X4008C1F Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS WE Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high the end of write ...
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... K6X4008C1F Family PACKAGE DIMENSIONS 32 PIN DUAL INLINE PACKAGE (600mil) #32 13.60 0.20 0.535 0.008 #1 1. 0.075 32 PIN PLASTIC SMALL OUTLINE PACKAGE (525mil) #32 #1 20.87 0.822 20.47 0.806 +0.100 0.41 -0.050 0. +0.004 0.016 0.028 -0.002 42.31 MAX 1.666 41.91 0.20 1.650 0.008 0.46 0.10 0.018 0.004 1.52 2.54 0.10 0.060 0.100 0.004 #17 14.12 0.30 0.556 0.012 #16 2.74 0.20 MAX 0.108 0.008 3 ...
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... K6X4008C1F Family PACKAGE DIMENSIONS 32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F) #32 #1 0.825 0.95 0.40 0. 0.037 0.016 0.004 32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400R) #1 #32 21.35 0.841 20.95 0.825 0.95 0.40 0. 0.016 0.037 0.004 #17 11.76 0.463 #16 21.35 1.00 MAX 0.841 0.039 20.95 0.10 0.004 0.05 MIN 1.27 0.002 0.050 #16 11.76 0.20 0.463 0.008 #17 1.00 MAX 0.039 ...