K7D801871B-HC30 Samsung semiconductor, K7D801871B-HC30 Datasheet - Page 6
![no-image](/images/manufacturer_photos/0/5/578/samsung_semiconductor_sml.jpg)
K7D801871B-HC30
Manufacturer Part Number
K7D801871B-HC30
Description
256Kx36 & 512Kx18 SRAM
Manufacturer
Samsung semiconductor
Datasheet
1.K7D801871B-HC30.pdf
(16 pages)
- Current page: 6 of 16
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K7D803671B
K7D801871B
BUS CYCLE STATE DIAGRAM
NOTE :
1. State transitions ; B
B
B
INCREMENT
1
2
3
ADDRESS
=(Load Address), B
=(Read), B
=(Single Data Rate), B
READ
SDR
2
POWER
=(Write)
UP
1
=(Increment Address, Continue)
3
=(Double Data Rate)
INCREMENT
ADDRESS
WRITE
SDR
NEW ADDRESS
- 6 -
NO OP
LOAD
INCREMENT
ADDRESS
READ
DDR
256Kx36 & 512Kx18 SRAM
INCREMENT
ADDRESS
WRITE
DDR
January. 2002
Rev 4.0
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