AS7C33128NTF32B ALSC [Alliance Semiconductor Corporation], AS7C33128NTF32B Datasheet

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AS7C33128NTF32B

Manufacturer Part Number
AS7C33128NTF32B
Description
3.3V 128K x 32/36 Flowthrough Synchronous SRAM with NTD
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
Logic block diagram
Selection guide
Features
• Organization: 131,072 words × 32 or 36 bits
• NTD
• Fast clock to data access: 7.5/8.0/10.0 ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous operation
• Flow-through mode
• Asynchronous output enable control
• Available in 100-pin TQFP package
• Byte write enables
• Clock enable for operation hold
April 2005
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
4/13/05, v 1.3
architecture for efficient bus operation
3.3V 128K × 32/36 Flowthrough Synchronous SRAM with NTD
A[16:0]
CE1
CE2
CE0
DQ[a,b,c,d]
ADV / LD
BWb
BWd
BWa
BWc
LBO
R/W
ZZ
CLK
CEN
32/36
17
D
D
Control
Burst logic
Address
Register
register
logic
CLK
Input
Data
CLK
Alliance Semiconductor
260
110
-75
8.5
7.5
30
CLK
Q
Q
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate V
• Self-timed write cycles
• Interleaved or linear burst modes
• Snooze mode for standby operation
17
OE
32/36
addr. registers
D
CLK
Write delay
®
230
100
-80
8.0
30
10
32/36
Q
OE
32/36
CLK
Output
Buffer
32/36
128K x 32/36
DQ[a,b,c,d]
17
SRAM
32/36
Array
Copyright © Alliance Semiconductor. All rights reserved.
AS7C33128NTF32B
AS7C33128NTF36B
200
-10
12
10
90
30
TM
DDQ
P. 1 of 18
Units
mA
mA
mA
ns
ns

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AS7C33128NTF32B Summary of contents

Page 1

... CLK D Write delay addr. registers CLK Control logic CLK 32/36 32/36 Data D Q Input Register CLK OE -75 -80 8.5 10 7.5 8.0 260 230 110 100 30 30 Alliance Semiconductor AS7C33128NTF32B AS7C33128NTF36B TM DDQ Q 17 CLK 128K x 32/36 SRAM Array 32/36 32/36 32/36 Output Buffer OE 32/36 DQ[a,b,c,d] -10 Units 200 ...

Page 2

... Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C33128NTF32B/36B Speed 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.0/10 ns 7.5/8.0/10 ns 7.5/8.0/10 ns 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.0/10 ns 7.5/8.0/10 ns 7.5/8.0/ ...

Page 3

... DQd4 25 DQd5 V 26 SSQ V 27 DDQ 28 DQd6 29 DQd7 30 NC/DQPd Note: For pins 1, 30, 51, and 80, NC applies to the x32 configuration. DQPn applies to the x36 configuration. 4/13/05, v 1.3 AS7C33128NTF32B/36B ® TQFP 14 x 20mm Alliance Semiconductor 80 DQPb/NC 79 DQb7 78 DQb6 77 V DDQ 76 V SSQ 75 DQb5 74 DQb4 ...

Page 4

... Functional Description The AS7C33128NTF32B/36B family is a high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) organized as 131,072 words × bits and incorporates a LATE Write. This variation of the 4Mb+ synchronous SRAM uses the No Turnaround Delay (NTD write operation that improves bandwidth over flowthrough burst devices normal flowthrough burst device, the write data, command, and address are all applied to the device on the same clock edge ...

Page 5

... ZZI Starting Address First increment Second increment Third increment Alliance Semiconductor AS7C33128NTF32B/36B . The duration of SB2 Linear burst order LBO = ...

Page 6

... L External NOP/WRITE ABORT (Begin Burst) High Next Current Alliance Semiconductor AS7C33128NTF32B/36B Operation DESELECT Cycle High-Z DESELECT Cycle High-Z DESELECT Cycle High-Z CONTINUE DESELECT Cycle High-Z READ Cycle (Begin Burst) READ Cycle (Continue Burst) DUMMY READ (Continue Burst) ...

Page 7

... Min Nominal V 3.135 3 3.135 3.3 DDQ Vss 0 0 Symbol Min Nominal V 3.135 3 2.375 2.5 DDQ Vss 0 0 Alliance Semiconductor AS7C33128NTF32B/36B Burst Dsel Burst Burst Min Max Unit –0.5 +4.6 –0 0.5 DD –0 0.5 DDQ – 1.8 – –65 +150 o –65 +135 Max Unit 3 ...

Page 8

... Deselected < Max IL Deselected < 0.2V, ≤ 0.2V or ≥ V all V – 0. ≥ V Deselected Max DD ≤ ≥ V all Alliance Semiconductor AS7C33128NTF32B/36B Min Max Unit -2 2 µA DD < µA DDQ +0.3 DDQ -0.3** 0 ...

Page 9

... CSH t 2.0 2.0 – CENS t 0.5 0.5 – CENH t 2.0 2.0 – ADVS t 0.5 0.5 – ADVH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C33128NTF32B/36B -10 Max Min Max Unit Notes 12 ns – – 8 – 4.0 4.0 ns – 2.5 ns 2,3,4 – – 2.5 ns – – 2,3,4 – – 4.0 4.0 ns 2,3,4 – ...

Page 10

... Falling input HZOE Q(A2) Q(A2Y‘01) Q(A2Y‘10) BURST BURST READ BURST READ Q(A2) READ READ Q(A2Ý11) Q(A2Ý01) Q(A2Ý10) Alliance Semiconductor AS7C33128NTF32B/36B Undefined t CYC A3 Q(A2Y‘11) Q(A3) Q(A3Y‘01) STALL READ BURST Q(A3) READ Q(A3Ý01 ...

Page 11

... ADV/LD OE D(A1) Din t HZOE Dout Q(n-1) WRITE DSEL Command D(A1) 4/13/05, v 1.3 ® D(A2) D(A2Y‘01) D(A2Y‘10) BURST BURST WRITE BURST WRITE WRITE D(A2) WRITE D(A2Ý10) D(A2Ý11) D(A2Ý01) Alliance Semiconductor AS7C33128NTF32B/36B t CYC D(A3) D(A2Y‘11) D(A3Y‘01) STALL WRITE BURST D(A3) WRITE D(A3Ý01 ...

Page 12

... Note: Ý = XOR when LBO = high/no connect. Ý = ADD when LBO = low. 4/13/05, v 1.3 ® HZOE LZC OH D(A2) Q(A3) Q(A4) D(A2Ý01) BURST BURST READ READ WRITE READ Q(A3) Q(A4) D(A2Ý01) Q(A4Ý01) Alliance Semiconductor AS7C33128NTF32B/36B t CYC HZC D(A5) Q(A6) D(A7) Q(A4Ý01) t LZOE WRITE READ WRITE DSEL D(A5) Q(A6) D(A7 ...

Page 13

... BURST Command Q(A1) Q(A1 Ý Note: Ý = XOR when LBO = high/no connect; Ý = ADD when LBO = low low. 4/13/05, v 1.3 ® Q(A1Ý10) Q(A1Ý01) STALL DSEL BURST BURST 01) Q(A1 10) DSEL Ý Alliance Semiconductor AS7C33128NTF32B/36B A2 A3 D(A2) BURST WRITE WRITE BURST NOP NOP D(A2) D(A2 10) Ý D(A2 01) D(A3) Ý ...

Page 14

... Timing waveform of snooze mode CLK ZZ setup cycle ZZ t ZZI I supply I SB2 All inputs Deselect or Read Only (except ZZ) Dout 4/13/05, v 1.3 ® t PUS ZZ recovery cycle t RZZI Deselect or Read Only High-Z Alliance Semiconductor AS7C33128NTF32B/36B Normal operation Cycle ...

Page 15

... L for 3.3V I/ DDQ for 2.5V I/O Figure B: Output load (A) at any given temperature and voltage. LZC IL Alliance Semiconductor AS7C33128NTF32B/36B Thevenin equivalent: +3.3V for 3.3V I/O; /+2.5V for 2.5V I/O 319Ω/1667Ω D OUT 5 pF* 353Ω/1538Ω GND *including scope and jig capacitance Figure C: Output load(B) ...

Page 16

... Package dimensions 100-pin quad flat pack (TQFP) TQFP Min Max A1 0.05 0.15 A2 1.35 1.45 b 0.22 0.38 c 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.90 16.10 He 21.90 22.10 L 0.45 0.75 L1 1.00 nominal a 0° 7° Dimensions in millimeters 4/13/05, v 1.3 AS7C33128NTF32B/36B ® Alliance Semiconductor b e α ...

Page 17

... AS7C33128NTF32B-75TQC TQFP x32 AS7C33128NTF32B-75TQI TQFP x36 AS7C33128NTF36B-75TQC TQFP x36 AS7C33128NTF36B-75TQI Notes: Add suffix ‘N’ to the above part number for Lead Free Parts (Ex. AS7C33128NTF32B-75TQCN) Part numbering guide AS7C 33 128 Alliance Semiconductor SRAM prefix 2. Operating voltage 3.3V 3. Organization: 128 = 128k 4 ...

Page 18

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C33128NTF32B/36B ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C33128NTF32B AS7C33128NTF36B Document Version: v 1.3 ...

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