SH3000 SEMTECH [Semtech Corporation], SH3000 Datasheet - Page 8

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SH3000

Manufacturer Part Number
SH3000
Description
Low-Power Programmable Multifunction Support IC for Microcontrollers
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
the frequency of the clock on the CLK
±0.025%, and maintain it to ±0.5% over temperature.
This compares favorable with the typical ±0.5% initial
clock accuracy and ±0.6% overall temperature stability
of ceramic resonators. The SH3000 replaces the typical
resonator, using less space and providing better
performance and functionality.
32 kHz signal. The absolute accuracy and stability of
the HF clock depends on the quality of the 32.768 kHz
internally generated clock; the low-frequency (LF)
Oscillator System is described later in this document.
used for high-accuracy timekeeping, an external 32.768
kHz watch crystal used as a reference for RTC provides
excellent accuracy and stability for the Clock
Management System.
(FLL) to synchronize the HF clock to the 32 kHz
reference. This architecture has several advantages
over the common PLL (Phase Locked Loop) systems,
including the ability to stop and re-start without
frequency transients or instability, and with instant
settling to a correct frequency. The conventional PLL
approach invariably includes a Low-Pass Filter that
requires a long settling time on re-start.
Copyright ©2003-2005 Semtech Corporation
SYSTEM MANAGEMENT
When the HF oscillator is operating alone, it can set
The HF oscillator can also be locked to the internal
When the Real Time Clock module of the SH3000 is
The SH3000 employs a Frequency Locked Loop
OUT
pin to
8
of the correct frequency while the ambient temperature
is changing. As the temperature drift of the HF oscillator
is quite small, any corrective action from the FLL system
is also small and gradual, commensurate with the
temperature variation.
stable.
processor writes the 13-bit Frequency Set value. The
resulting output frequency is calculated using simple
formulas [1] and [2] (reference frequency is 32.768 kHz):
For example, a post-divider setting of
Frequency Set value of 4000 (0x0FA0) produce an
output frequency of 1.024 MHz.
The primary purpose of the FLL is the maintenance
The FLL system in the SH3000 is unconditionally
To set a new frequency for the FLL, the host
F
F
OSC
OUT
= F
= 2048 Hz * (Frequency Set value + 1) [1]
OSC
/ (Post-divider setting) [2]
SH3000 MicroBuddy™
V1.15
÷
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8 and the

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