SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 21

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

© 2006 Semtech Corp.
POWER MANAGEMENT
Register Descriptions
Register Name WakeupTime
Register Name WakeupTime
Register Name WakeupTime
Address(hex): 00
Address(hex): 01
Address(hex): 02
Bit No.
Bit No.
Bit No.
Bit 7
[7:0]
Bit 7
[7:0]
Bit 7
[7:0]
Description
WakeupTime
Most significant byte of the
4-byte WakeupTime
Description
WakeupTime
Bits [23:16] of the 4-byte WakeupTime
Description
WakeupTime
Bits [15:8] of the 4-byte WakeupTime
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Description
Description
Description
Bit Value
00 (hex)
Bit 4
Bit 4
Bit 4
21
(RW) 8 Most significant bits
of the WakeupTime .
Value Description
The Periodic Interval Timer (PIT) generates a periodic interrupt, the
interval of which is set by the four WakeupTime registers.
Period = WakeupTime/32768.
Setting WakeupTime to 0 disables the PIT
This register only takes effect once the least significant byte
(address 03) has been written. All four bytes should be written,
even if some have not changed
(RW) Bits [23:16] of the
WakeupTime.
(RW) Bits [15:8] of the
WakeupTime.
Bit Value
Bit Value
00 (hex)
00 (hex)
Bit 3
Bit 3
Bit 3
Value Description
See register 00 description
Value Description
See register 00 description
Bit 2
Bit 2
Bit 2
Default Value: 0000 0000
Reset Event: P
Default Value: 0000 0000
Reset Event: P
Default Value: 0000 0000
Reset Event: P
Bit 1
Bit 1
Bit 1
www.semtech.com
SH3100
Bit 0
Bit 0
Bit 0