RT9502 RICHTEK [Richtek Technology Corporation], RT9502 Datasheet - Page 12

• Manufacturer Part Number: RT9502
• Description: Linear Single Cell Li-Ion Battery Charger IC with Dual Input Supply
• Manufacturer: RICHTEK [Richtek Technology Corporation]

RT9502
Temperature Regulation and Thermal Protection
In order to maximize the charge rate, the RT9502 features
a junction temperature regulation loop. If the power
dissipation of the IC results in a junction temperature
greater than the thermal regulation threshold (125°C), the
RT9502 throttles back on the charge current in order to
maintain a junction temperature around the thermal
regulation threshold (125°C). The RT9502 monitors the
junction temperature, T
battery from the input if T
continues until junction temperature falls below thermal
regulation threshold (125°C) by the hysteresis level. This
feature prevents the chip from damage.
Selecting the Input and Output Capacitors
In most applications, the most important is the high-
frequency decoupling capacitor on the input of the RT9502.
A 1uF ceramic capacitor, placed in close proximity to input
pin and GND pin is recommended. In some applications
depending on the power supply characteristics and cable
length, it may be necessary to add an additional 10uF
ceramic capacitor to the input. The RT9502 requires a
small output capacitor for loop stability. A 1uF ceramic
capacitor placed between the BATT pin and GND is typically
sufficient.
Layout Consideration
The RT9502 is a fully integrated low cost single-cell Li-
Ion battery charger ideal for portable applications. Careful
PCB layout is necessary. For best performance, place all
peripheral components as close to the IC as possible. A
short connection is highly recommended. The following
guidelines should be strictly followed when designing a
PCB layout for the RT9502.
www.richtek.com
12
Input capacitor should be placed close to IC and
connected to ground plane. The trace of input in the
PCB should be placed far away the sensitive devices or
shielded by the ground.
The GND should be connected to a strong ground plane
for heat sinking and noise protection.
The connection of R
noisy traces. The short wire is recommended to prevent
EMI and noise coupling.
SETA
J
, of the die and disconnects the
J
exceeds 125°C. This operation
should be isolated from other
The GND should be connected to a
strong ground plane for heat sinking
and noise protection.
C1
Output capacitor should be placed close to IC and
connected to ground plane to reduce noise coupling.
The TS's capacitor should be placed close to TS (Pin 9)
and connected to ground plane. The capacitance (0.1uF
to 10uF) base on PCB layout. When PCB has poor
layout, the 10uF is recommended to prevent noise.
PGOOD
CHG_S
C2
ACIN
GND
USB
The capacitor should be
placed close to IC pin and
connected to ground plane.
1
2
3
4
5
GND
GND
Figure 5
The connection of R
isolated from other noisy traces.
The short wire is recommended to
prevent EMI and noise coupling.
10
9
8
7
9
BATT
TS
EN
ISETU
ISETA
R
DS9502-02 April 2011
SETA
The TS's capacitor should be
placed close to TS(Pin 9) and
connected to ground plane.
The capacitance (0.1uF to
10uF) base on PCB layout.
When PCB has poor layout
the 10uF is recommended to
prevent noise.
SETA
C3
C4
should be
Battery