74ACTQ16240SSC Fairchild Semiconductor, 74ACTQ16240SSC Datasheet - Page 4

IC INVERTER DUAL 8-INPUT 48SSOP

74ACTQ16240SSC

Manufacturer Part Number
74ACTQ16240SSC
Description
IC INVERTER DUAL 8-INPUT 48SSOP
Manufacturer
Fairchild Semiconductor
Series
74ACTQr
Datasheet

Specifications of 74ACTQ16240SSC

Logic Type
Inverter
Number Of Inputs
8
Number Of Circuits
2
Current - Output High, Low
24mA, 24mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Logic Family
ACTQ
Number Of Channels Per Chip
16
Polarity
Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
16 / 3
Output Type
3-State
Propagation Delay Time
7.3 ns at 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
t
t
t
t
t
t
t
t
t
t
t
t
t
(Note 9)
t
(Note 9)
t
(Note 9)
C
C
PLH
PHL
PZH
PZL
PHZ
PLZ
PLH
PHL
PZH
PZL
PHZ
PLZ
OSH
OSLH
OST
AC Electrical Characteristics
Note 8: Voltage Range 5.0 is 5.0V 0.5V.
Extended AC Electrical Characteristics
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device. The
specification applies to any outputs switching HIGH to LOW (t
(t
Note 10: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all low-to-high,
high-to-low, etc.).
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 12: 3-STATE delays are load dominated and have been excluded from the datasheet.
Note 13: The Output Disable Time is dominated by the RC network (500 , 250 pF) on the output and has been excluded from the datasheet.
Capacitance
IN
PD
OST
Symbol
Symbol
L
Symbol
).
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Pin to Pin Skew
HL Data to Output
Pin to Pin Skew
LH Data to Output
Pin to Pin Skew
LH/HL Data to Output
Input Pin Capacitance
Power Dissipation Capacitance
Parameter
Parameter
Parameter
OSHL
(Note 8)
V
(V)
5.0
5.0
5.0
), LOW to HIGH (t
CC
Min
4.0
4.0
3.5
3.4
3.6
3.1
16 Outputs Switching
Typ
4.5
30
T
4
Min
2.7
3.0
2.5
2.7
2.3
2.0
A
V
C
OSLH
(Note 10)
40 C to 85 C
CC
L
Typ
T
C
), or any combination switching LOW to HIGH and/or HIGH to LOW
50 pF
A
L
Com
Typ
4.8
5.1
4.5
4.7
5.0
4.6
50 pF
25 C
Units
pF
pF
Max
11.2
10.0
10.1
10.0
8.9
8.1
1.2
2.5
4.3
Max
7.3
7.3
7.4
7.5
7.9
7.4
V
V
CC
CC
T
A
Min
5.0V
5.0V
T
5.6
5.6
A
C
V
Min
2.7
2.7
2.3
2.0
3.0
2.5
(Note 11)
L
(Note 12)
(Note 13)
40 C to 85 C
CC
C
40 C to 85 C
L
250 pF
Com
Conditions
50 pF
Max
13.8
13.6
Max
7.8
8.0
8.2
7.9
7.8
7.9
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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