IS41C16100S60K INTEGRATED CIRCUIT SOLUTION, IS41C16100S60K Datasheet

IS41C16100S60K

Manufacturer Part Number

IS41C16100S60K

Description

SOJ-42

Manufacturer

INTEGRATED CIRCUIT SOLUTION

Datasheet

1.IS41C16100S60K.pdf (20 pages)

Specifications of IS41C16100S60K

Date_code

04+

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EY TIMING PARAMETERS

PIN CONFIGURATIONS

50(44)-Pin TSOP II

IS41C16100S

IS41LV16100S

1M x 16 (16-MBIT) DYNAMIC RAM

WITH EDO PAGE MODE

FEATURES

• Extended Data-Out (EDO) Page Mode access cycle

• TTL compatible inputs and outputs; tristate I/O

• Refresh Interval:

• JEDEC standard pinout

• Single power supply:

• Byte Write and Byte Read operation via two CAS

• Industrail Temperature Range -40°C to 85°C

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

Integrated Circuit Solution Inc.

DR004-0B

Parameter

Max. RAS Access Time (t

Max. CAS Access Time (t

Max. Column Address Access Time (t

Min. EDO Page Mode Cycle Time (t

Min. Read/Write Cycle Time (t

Refresh Mode: 1,024 cycles /16 ms

Self refresh Mode - 1,024 cycles / 128ms

RAS-Only, CAS-before-RAS (CBR), and Hidden

VCC

RAS

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

5V ± 10% (IS41C16100S)

3.3V ± 10% (IS41LV16100S)

RAC

CAC

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

LCAS

UCAS

GND

)

42-Pin SOJ

VCC

RAS

VCC

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

-45

(1)

-50

DESCRIPTION

The

16-bit high-performance CMOS Dynamic Random Access

Memories. These devices offer an accelerated cycle access

called EDO Page Mode. EDO Page Mode allows 1,024 ran-

dom accesses within a single row with access cycle time as

short as 20 ns per 16-bit word. The Byte Write control, of upper

and lower byte, makes the IS41C16100S ideal for use in

16-, 32-bit wide data bus systems.

These features make the IS41C16100Sand IS41LV16100S

ideally suited for high-bandwidth graphics, digital signal

processing, high-performance computing systems, and

peripheral applications.

The IS41C16100S and IS41LV16100S are packaged in a

42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2.

ICSI

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

LCAS

UCAS

GND

-60

104

IS41C16100S and IS41LV16100S are 1,048,576 x

PIN DESCRIPTIONS

I/O0-15

A0-A9

RAS

UCAS

LCAS

Vcc

GND

Unit

Address Inputs

Data Inputs/Outputs

Write Enable

Output Enable

Row Address Strobe

Upper Column Address Strobe

Lower Column Address Strobe

Power

Ground

No Connection

Note:

1. 45 ns Only for Vcc = 3.3V.

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