M4A332327JC Lattice Semiconductor Corp., M4A332327JC Datasheet
M4A332327JC
Manufacturer Part Number
M4A332327JC
Description
PLCC44
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.M4A3-256128-10YC.pdf
(62 pages)
Specifications of M4A332327JC
Date_code
08+
- Current page: 1 of 62
- Download datasheet (2Mb)
FEATURES
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Publication# ISPM4A
Amendment/ 0
High-performance, E
Flexible architecture for rapid logic designs
— Excellent First-Time-Fit
— SpeedLocking
— Central, input and output switch matrices for 100% routability and 100% pin-out retention
High speed
— 5.0ns t
— 182MHz f
32 to 512 macrocells; 32 to 768 registers
44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
Flexible architecture for a wide range of design styles
— D/T registers and latches
— Synchronous or asynchronous mode
— Dedicated input registers
— Programmable polarity
— Reset/ preset swapping
Advanced capabilities for easy system integration
— 3.3-V & 5-V JEDEC-compliant operations
— JTAG (IEEE 1149.1) compliant for boundary scan testing
— 3.3-V & 5-V JTAG in-system programming
— PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
— Safe for mixed supply voltage system designs
— Programmable pull-up or Bus-Friendly
— Hot-socketing
— Programmable security bit
— Individual output slew rate control
Advanced E
Lead-free package options
PD
2
Commercial and 7.5ns t
Rev: M
Issue Date: September 2006
CNT
CMOS process provides high-performance, cost-effective solutions
TM
performance for guaranteed fixed timing
2
CMOS 3.3-V & 5-V CPLD families
TM
and refit feature
ispMACH
High Performance E
In-System Programmable Logic
PD
Industrial
TM
inputs and I/Os
™
4A CPLD Family
2
CMOS
®
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