MC74HCT04ADR2 ON Semiconductor, MC74HCT04ADR2 Datasheet
MC74HCT04ADR2
Specifications of MC74HCT04ADR2
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MC74HCT04ADR2 Summary of contents
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MC74HCT04A Hex Inverter With LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT04A may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT04A is identical in pinout to the LS04. Features • Output ...
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... FUNCTION TABLE Inputs ORDERING INFORMATION Device MC74HCT04AN MC74HCT04ANG MC74HCT04AD MC74HCT04ADG MC74HCT04ADR2 MC74HCT04ADR2G MC74HCT04ADTR2 MC74HCT04ADTR2G MC74HCT04AFEL MC74HCT04AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free ...
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... Maximum Quiescent Supply CC Current (per Package) DI Additional Quiescent Supply CC Current 1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). 2. Total Supply Current = I + Σ Î Î Î Î Î Value Î Î Î Î Î ...
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... THL C Maximum Input Capacitance in 3. For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). C Power Dissipation Capacitance (Per Inverter Used to determine the no−load dynamic power consumption Semiconductor High− ...
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−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...
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... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...
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... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...