ST16C2552IJ44 Exar Corporation, ST16C2552IJ44 Datasheet

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ST16C2552IJ44

Manufacturer Part Number
ST16C2552IJ44
Description
PLCC44
Manufacturer
Exar Corporation
Datasheet

Specifications of ST16C2552IJ44

Date_code
09+

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0
OCTOBER 2006
GENERAL DESCRIPTION
The
asynchronous receiver and transmitter (UART). The
ST16C2552 is an improved version of the PC16552
UART. The 2552 provides enhanced UART functions
with 16 byte FIFOs, a modem control interface, and
data rates up to 4 Mbps. Onboard status registers
provide
operational status.
control features may be tailored by external software
to meet specific user requirements. Indepedendent
programmable baud rate generators are privded to
select transmit and receive clock rates from 50 Bps to
4 Mbps. The baud rate generator can be configured
for either crystal or external clock input. An internal
loop-back capability allows onboard diagnostics. The
2552 provides block mode data transfers (DMA)
through FIFO controls. DMA transfer monitoring is
provided through the signals TXRDY# and RXRDY#.
An Alternate Function Register provides the user with
the ability to initialize both UARTs concurrently. The
2552 is available in the 44-PLCC package.
APPLICATIONS
Exar
F
IGURE
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
Corporation 48720 Kato Road, Fremont CA, 94538
ST16C2552
1. ST16C2552 B
the
BAUDOUTA#, or
BAUDOUTB#, or
TXRDYA#
TXRDYB#
RXRDYA#)
RXRDYB#)
CHSEL
(OP2A#,
(OP2B#,
user
D7:D0
A2:A0
MFA#
MFB#
Reset
IOW#
IOR#
INTA
INTB
CS#
(2552)
System interrupts and modem
with
LOCK
error
is
8-bit Data
Interface
D
Bus
IAGRAM
a
indications
dual
universal
and
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
(510) 668-7000
UART
BRG
Regs
(same as Channel A)
Modem Control Logic
Crystal Osc/Buffer
UART Channel B
FEATURES
Added feature in devices with top marking "A2
YYWW" and newer:
UART Channel A
Pin-to-pin and functionally compatible to National
PC16552 and Exar’s XR16L2752 and XR16C2852
4 Mbps transmit/receive operation (64 MHz
External Clock Frequency)
2 Independent UART Channels
DMA operation and DMA monitoring via TXRDY#
and RXRDY# pins
UART internal register sections A & B may be
written to concurrently
Multi-Function
functions with few I/O pins
Programmable character lengths (5, 6, 7, 8) with
even, odd, or no parity
Crystal oscillator or external clock input
16 Byte TX FIFO
16 Byte RX FIFO
TX & RX
5 Volt Tolerant Inputs
Register Set Compatible to 16C550
16 byte Transmit FIFO to reduce the bandwidth
requirement of the external CPU
16 byte Receive FIFO with error tags to reduce
the bandwidth requirement of the external CPU
4 selectable RX FIFO Trigger Levels
Fixed Transmit FIFO interrupt trigger level
Full Modem Interface (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
FAX (510) 668-7017
output
3.3V or 5V VCC
GND
TXA (or TXIRA)
RXA (or RXIRA)
TXB (or TXIRB)
RXB (or RXIRB)
XTAL1
XTAL2
CTS#A/B, RI#A/B,
CD#A/B, DSR#A/B
DTR#A/B, RTS#A/B
ST16C2552
allows
www.exar.com
2552BLK
more
REV. 4.2.1
package

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