MC74VHCT373ADWRG ON Semiconductor, MC74VHCT373ADWRG Datasheet

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MC74VHCT373ADWRG

Manufacturer Part Number
MC74VHCT373ADWRG
Description
IC LATCH TRANSP OCT 2ST 20-SOICW
Manufacturer
ON Semiconductor
Series
74VHCTr
Type
D-Typer
Datasheet

Specifications of MC74VHCT373ADWRG

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
5.1ns
Current - Output High, Low
8mA, 8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Logic Family
VHCT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Package Type
SOIC W
Propagation Delay Time
14.5ns
Operating Supply Voltage (typ)
5V
High Level Output Current
-8mA
Low Level Output Current
8mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74VHCT373A
Octal D−Type Latch
with 3−State Output
with 3−state output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
output which provides high noise immunity and stable output.
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
provide protection when voltages between 0 V and 5.5 V are applied,
regardless of the supply voltage. These input and output structures
h e l p p r e v e n t d e v i c e d e s t r u c t i o n c a u s e d b y s u p p l y
voltage−input/output voltage mismatch, battery backup, hot insertion,
etc.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 4
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74VHCT373A is an advanced high speed CMOS octal latch
This 8−bit D−type latch is controlled by a latch enable input and an
The internal circuit is composed of three stages, including a buffer
The VHCT inputs are compatible with TTL levels. This device can
The VHCT373A input and output (when disabled) structures
High Speed: t
Low Power Dissipation: I
TTL−Compatible Inputs: V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5 V to 5.5 V Operating Range
Low Noise: V
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Chip Complexity: 196 FETs or 49 Equivalent Gates
Pb−Free Packages are Available*
Human Body Model > 2000 V;
Machine Model > 200 V
PD
OLP
= 7.7 ns (Typ) at V
= 1.6 V (Max)
CC
IL
= 4 mA (Max) at T
= 0.8 V; V
CC
= 5.0 V
IH
= 2.0 V
A
= 25°C
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
OE
(Note: Microdot may be in either location)
H
L
L
L
1
1
A
WL, L
YY, Y
WW, W
G or G
ORDERING INFORMATION
SOIC−20WB
INPUTS
SUFFIX DW
CASE 751D
CASE 948E
SUFFIX DT
TSSOP−20
FUNCTION TABLE
http://onsemi.com
LE
H
H
X
L
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
D
H
X
X
L
20
1
20
1
MC74VHCT373A/D
DIAGRAMS
AWLYYWWG
MARKING
VHCT373A
No Change
OUTPUT
ALYWG
VHCT
373A
Q
G
H
Z
L

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MC74VHCT373ADWRG Summary of contents

Page 1

... Chip Complexity: 196 FETs or 49 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev ...

Page 2

DATA 8 D3 INPUTS Figure 1. Logic Diagram Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

DC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

... Minimum Setup Time Minimum Hold Time ORDERING INFORMATION Device MC74VHCT373ADWR2 MC74VHCT373ADWRG MC74VHCT373ADTR2 MC74VHCT373ADTRG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. D 1.5V t PLH Q 1 ...

Page 5

DEVICE UNDER TEST MC74VHCT373A TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 7. Test Circuit ...

Page 6

20X 0. 18X A1 T MC74VHCT373A PACKAGE DIMENSIONS SOIC− SUFFIX CASE 751D−05 ISSUE G NOTES DIMENSIONS ARE IN MILLIMETERS. ...

Page 7

... F DETAIL DETAIL E N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

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