CXA3197 Sony Corporation, CXA3197 Datasheet - Page 24

• Manufacturer Part Number: CXA3197
• Description: 10-bit 125MSPS D/A Converter
• Manufacturer: Sony Corporation

Block Diagram & Timing Chart (MUX.1B Mode)
In MUX.1B mode, Data A and Data B are internally multiplexed and then the resulting signal can be analog
output. The frequency of the clock is halved by the built-in clock frequency divider circuit. CLK/2 can be reset
by the reset signal.
RESET
(Active High)
Input Data A
Input Data B
CLK/2
(Internal)
CLK
Input Data A
Input Data B
RESET
CLK
ts-rst
(Active High)
(Active Low)
N – 2
N – 1
th-rst
Tpw1 Tpw0
D-FF out
Input Latch A
Input Latch B
N + 1
R
D
ts
N
Q
Q
0
th
t
PD
1
(A)
t
PD
(Internal)
N + 2
N + 3
– 24 –
(B)
tdo
CLK/2
2
MUX
N
3
tdo
N + 1
N + 4
N + 5
Latch
N + 2
N + 3
DAC
N + 6
N + 7
N + 4
Analog out
CXA3197R
N + 5
N + 8
N + 9