AK4160 AKM [Asahi Kasei Microsystems], AK4160 Datasheet - Page 31

• Manufacturer Part Number: AK4160
• Description: 16-channel Capacitive Touch Sensor IC
• Manufacturer: AKM [Asahi Kasei Microsystems]

MS1313-E-01
Bits
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
TOUCH
RANGE
DRDY
Name
GPIN
REL
ACF
TSL
Permission of Data Ready Interrupt
Permission of Touch Interrupt
Permission of Release Interrupt
Permission of Automatic Configuration Fail Interrupt
Permission of Upper Limit Over Interrupt
Permission of GPIO Input Interrupt
Reserved: This bit should be written “0”.
Level Output Operational Mode Selection of Touch Status
0: Edge Operation
1: Level Operation
This interrupt is generated at the end of a measurement. The measurement value
should be read from CSDn register (Addr 0x05-0x24).
The interrupt interval is “Sampling Rate x Number of Sample”. The “Number of
Sample” is set by NF2S bits in Addr 0x70.
The intended terminal can be configured by IRQ mask register (Addr
0x66-0x67, 0x6A-0x6B, 0x6E-0x6F).
The intended terminal can be configured by IRQ mask register (Addr
0x66-0x67, 0x6A-0x6B, 0x6E-0x6F).
When the measurement value on automatic configuration is out of the stipulated
range, this interrupt is generated.
When the measurement value is over the upper limit in a measurement operation,
this interrupt is generated.
When the interrupt function is configured by GPIO control registers (Addr
0x35/0x37/…/0x43 IRQC bit),this interrupt is generated by the factor
occurrence.
The IRQ pin responds to the edge for the interrupt factor selected by DRDY bit,
Touch function or release function is selected by TOUCH bit and REL bit. The
TOUCH bit, REL bit, ACF bit, RANGE bit, and GPIN bit. The clearance setting,
polarity setting, driver setting, and etc. are configured by Addr 0x65/0x69/0x6D.
intended terminal can be configured by IRQ mask register (Addr 0x66-0x67,
0x6A-0x6B, 0x6E-0x6F). The other interrupt factor cannot be selected. The
polarity setting, driver setting, and etc. are configured by Addr 0x65/0x69/0x6D.
The status cannot be cleared unlike the edge operation. The IRQ Status (IRQ2-0
bit of Addr 0x03) returns the input level of the IRQ pin.
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Description
[AK4160]
2011/11