MT89L80AN1 ZARLINK [Zarlink Semiconductor Inc], MT89L80AN1 Datasheet - Page 6

• Manufacturer Part Number: MT89L80AN1
• Description: CMOS ST-BUSTM Family
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

4-3
2-0
Bit
6
5
Bit
2
1
0
Address Bits
Select Bits
Message
(unused)
Memory
Stream
Name
Mode
Message
CSTo Bit
Channel
Enable
Output
Name
When 1, the contents of the Connection Memory Low are output on the Serial Output
streams except when the ODE pin is low. When 0, the Connection Memory bits for each
channel determine what is output.
0-0 - Not to be used
0-1 - Data Memory (read only from the microprocessor port)
1-0 - Connection Memory Low
1-1 - Connection Memory High
The number expressed in binary notation on these bits refers to the input or output ST-BUS
stream which corresponds to the subsection of memory made accessible for subsequent
operations.
When 1, the contents of the corresponding location in Connection Memory Low are
output on the location’s channel and stream. When 0, the contents of the corresponding
location in Connection Memory Low act as an address for the Data Memory and so
determine the source of the connection to the location’s channel and stream.
This bit is output on the CSTo pin one channel early. The CSTo bit for stream 0 is output
first.
If the ODE pin is high and bit 6 of the Control Register is 0, then this bit enables the
output driver for the location’s channel and stream. This allows individual channels on
individual streams to be made high-impedance, allowing switching matrices to be
constructed. A 1 enables the driver and a 0 disables it.
7
7
Control
Mode
Bits
No Corresponding Memory
- These bits give 0s if read.
Figure 5 - Connection Memory High Bits
6
6
Figure 4 - Control Register Bits
(unused)
5
5
Zarlink Semiconductor Inc.
MT89L80
4
4
Memory
Select
Bits
6
3
3
Description
Description
2
2
Address
Per Channel
Stream
Control Bits
Bits
1
1
0
0
Data Sheet