ZL30105QDG ZARLINK [Zarlink Semiconductor Inc], ZL30105QDG Datasheet - Page 18

• Manufacturer Part Number: ZL30105QDG
• Description: T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

3.0
3.1
3.2
The loop filter and limiter settings are selected through the APP_SEL and SEC_MSTR pins, see Table 2. The
maximum loop filter bandwidth is also dependent on the frequency of the currently selected reference (REF0/1/2).
00, 01, 10, 11
APP_SEL
00, 01, 10
Application Selection
Loop Filter and Limiter Selection
11
Control and Modes of Operation
APP_SEL
00
01
10
11
SEC_MSTR
PDH Stratum 3
0
0
1
Table 1 - Application Selection and the Out of Range Limits
Application
SDH
DS1
E1
Detected REF Frequency
Table 2 - Loop Filter and Limiter Settings
8.192 MHz, 16.384 MHz,
1.544 MHz, 2.048 MHz,
19.44 MHz
Telcordia GR-1244-CORE Stratum 4/4E
Telcordia GR-1244-CORE Stratum 3
2 kHz
8 kHz
any
any
Zarlink Semiconductor Inc.
Telcordia GR-253-CORE
ZL30105
Applicable Standard
ITU-T G.813 Option 1
ETSI ETS 300 011
18
ANSI T1.403
ITU-T G.703
Loop Filter Bandwidth
922 Hz
1.8 Hz
3.6 Hz
14 Hz
58 Hz
Out Of Range Limits
100 - 130 ppm
9.2 - 12 ppm
9.2 - 12 ppm
64 - 83 ppm
Phase Slope
9.5 ms /s
9.5 ms /s
9.5 ms /s
Limiting
7.5 µ/s
61 µ/s
Data Sheet