ZL50234GDC ZARLINK [Zarlink Semiconductor Inc], ZL50234GDC Datasheet - Page 29

• Manufacturer Part Number: ZL50234GDC
• Description: 8 Channel Voice Echo Canceller
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Data Sheet
This register is used to select gain values on RIN, ROUT, SIN and SOUT. Gains has the following structure:
RIN ROUT SIN SOUT
Gains = 0xxx 0xxx 0xxx 0xxx
Gains is split into four groups of four bits. Each group maps to a different signal port (as indicated above), and
has three gain bits. The following table indicates how these gain bits are used:
Bit2 Bit1 Bit0
1
Note that the -12 dB PAD bit in Control Register 1 provides 12 dB of attenuation in the Rin to Rout path, and
will override the settings in Gains.
0
0
0
0
Bit 7
Bit 7
0
0
0
1
1
0
0
Power-up
Power-up
= 0100 0100 0100 0100 (4444
44
44
0
1
0
1
0
hex
hex
Bit 6
Rin2
Bit 6
Sin2
-12 dB
-3 dB
-6 dB
-9 dB
0 dB (default)
Gain Level
Rin1
Bit 5
Bit 5
Sin1
Functional Description of Register Bits
hex
ECA: Gains Register 2
ECB: Gains Register 2
ECA: Gains Register 1
ECB: Gains Register 1
) default
Bit 4
Rin0
Bit 4
Sin0
Zarlink Semiconductor Inc.
Bit 3
Bit 3
0
0
Rout2
Sout2
Bit 2
Bit 2
1D
3D
1C
3C
Rout1
Sout1
Bit 1
Bit 1
hex
hex
hex
hex
R/W Address:
R/W Address:
R/W Address:
R/W Address:
+ Base Address
+ Base Address
+ Base Address
+ Base Address
ZL50234
Rout0
Sout0
Bit 0
Bit 0
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