S3C72N4 Samsung semiconductor, S3C72N4 Datasheet - Page 6

• Manufacturer Part Number: S3C72N4
• Description: The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange
• Manufacturer: Samsung semiconductor

PRODUCT OVERVIEW
NOTE: Pull-up resistors for all I/O ports automatically disabled if they are configured to output mode.
1-
LCDSY
TCL0
TCLO0
INT0
INT1
INT2
KS0–KS3
CLO
BUZ
X
XT
V
V
RESET
TEST
6
IN
DD
SS
IN
,
Pin Name
X
,
OUT
XT
OUT
Type
Pin
I/O
I/O
I/O
I/O
I/O
–
–
–
–
–
–
I
I
I
Table 1-1. S3C72N2/C72N4 Pin Descriptions (Continued)
LCD synchronization clock output for
LCD display expansion
External clock input for timer/counter 0
Timer/counter 0 clock output
External interrupt. The triggering edge for
INT0 and INT1 is selectable. Only INT0 is
synchronized with the system clock.
Quasi-interrupt with detection of rising
edge signals.
Quasi-interrupt input with falling edge
detection.
CPU clock output
2, 4, 8 or 16 kHz frequency output for
buzzer sound with 4.19 MHz main system
clock or 32.768 kHz subsystem clock.
Crystal, ceramic or RC oscillator pins for
main system clock. (For external clock
input, use X
phase to X
Crystal oscillator pins for subsystem
clock. (For external clock input, use XT
and input XT
Main power supply
Ground
Reset signal
Test signal input (must be connected to
V
SS
)
OUT
IN
IN
and input X
)
’s reverse phase to XT
Description
IN
’s reverse
OUT
IN
)
Number
29–32
12,11
14,15
26
20
21
17
18
19
23
24
10
16
13
9
P6.0–P6.3
Share
P3.1
P1.3
P2.0
P2.2
P1.0
P1.1
P1.2
P2.3
Pin
–
–
–
–
–
–
S3C72N2/C72N4/P72N4
Reset
Value
Input
Input
Input
Input
Input
Input
Input
Input
Input
–
–
–
–
–
Circuit
Type
A-4
A-4
A-4
D
D
D
D
D
B
–
–
–
–
–