ART10012T IRF [International Rectifier], ART10012T Datasheet - Page 6

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ART10012T

Manufacturer Part Number
ART10012T
Description
28V Input, Triple Output / HYBRID - HIGH RELIABILITY RADIATION HARDENED DC/DC CONVERTER
Manufacturer
IRF [International Rectifier]
Datasheet
Circuit Description and Application Information
The ART28XXT series of converters have been designed
using a single ended forward switched mode converter
topology. (refer to Figure I.) Single ended topologies enjoy
some advantage in radiation hardened designs in that they
eliminate the possibility of simultaneous turn on of both
switching elements during a radiation induced upset; in
addition, single ended topologies are not subject to
transformer saturation problems often associated with
double ended implementations.
The design incorporates a two-stage LC input filter to
attenuate input ripple current. A low overhead linear bias
regulator is used to provide bias voltage for the converter
primary control logic and a stable, well regulated reference
for the error amplifier. Output control is realized using a
wide band discrete pulse width modulator control circuit
incorporating a unique non-linear ramp generator circuit.
This circuit helps stabilize loop gain over variations in line
voltage for superior output transient response. Nominal
conversion frequency has been selected as 250 KHz to
maximize efficiency and minimize magnetic element size.
Output voltages are sensed using a coupled inductor and
a patented magnetic feedback circuit. This circuit is
relatively insensitive to variations in temperature, aging,
radiation and manufacturing tolerances making it
particularly well suited to radiation hardened designs. The
control logic has been designed to use only radiation
tolerant components, and all current paths are limited with
series resistance to limit photo currents.
Other key circuit design features include short circuit
protection, undervoltage lockout and an external
synchronization port permitting operation at an externally
set clock rate.
ART28XXT Series
6
Enable
Sync Out
Return
+Input
Sync In
Input
Under-Voltage
Detector
Filter
EMI
ART28XXT Circuit Description
Primary Bias
& Reference
Pulse Width
Figure I. ART Block Diagram
Modulator
Circuit
Short
Thermal Considerations
The circuit topology used for regulating output voltages in
the ART28XXT series of converters was selected for a
number of reasons. Significant among these is the ability
to simultaneously provide adequate regulation to three
output voltages while maintaining modest circuit complexity.
These attributes were fundamental in retaining the high
reliability and insensitivity to radiation that characterizes
device performance. Use of this topology dictates
maintaining the minimum load specified in the electrical
tables on each output. Operating the converter without a
load on any output will result in peak charging to an output
voltage well above the specified voltage regulation limits,
potentially in excess of ratings, and should be avoided.
Output load currents less than specification minimums will
result in regulation performance that exceeds the limits
presented in the tables. In most practical applications, this
lower bound on the load range does not present a serious
constraint; however the user should be mindfull of device
performance when operated outside specified limits.
The ART series of converters is capable of providing
relatively high output power from a package of modest
volume. The power density exhibited by these devices is
obtained by combining high circuit efficiency with effective
methods of heat removal from the die junctions. Good
design practices have effectively addressed this
requirement inside the device. However when operating
at maximum loads, significant heat generated at the die
junctions must be carried away by conduction from the
base. To maintain case temperature at or below the
specified maximum of 125°C, this heat can be transferred
by attachment to an appropriate heat dissipater held in
intimate contact with the converter base-plate.
Operating Guidelines
Sample
Hold
+15
Return
Return
-15
+5
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