JSH-42L3AD3-5G JDSU [JDS Uniphase Corporation], JSH-42L3AD3-5G Datasheet - Page 16

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JSH-42L3AD3-5G

Manufacturer Part Number
JSH-42L3AD3-5G
Description
LW 4x/2x/1x FC SFP with DDM
Manufacturer
JDSU [JDS Uniphase Corporation]
Datasheet
JSH-42L3AD3-5, JSH-42L3AD3-5G
JSH-42L3AD3-20
LW 4x/2x/1x FC SFP with DDM
Transmit Signal Interface (from host to transceiver)
JDSU Product Specification 21111542-001
Page 16 of 45
1. At 100Ω, differential peak-to-peak, the figure below shows the simplified circuit schematic for the transceiver high-speed differen-
2. Deterministic jitter (DJ) and total jitter (TJ) values are measured according to the methods defined in [2]. Jitter values at the output
3. Rise and fall times are measured from 20 - 80%, 100Ω differential.
4. At 2.125 GHz
DJ
TJ
Symbol
SDD
elec-xmit
elec-xmt
tial input lines. The input data lines have AC coupling capacitors. The capacitors are not required on the host card.
+Tx_DAT
of a transmitter or receiver section assume worst case jitter values at its respective input. [1UI(Unit Interval)=235.3 ps at 4.25Gb/s]
-Tx_DAT
V
o
11
Parameter
Amplitude
Deterministic Jitter
Total Jitter
Rise/Fall
Differential Skew
Input Return Loss
Return Loss
50 Ω
50 Ω
V
4.65 kΩ
DD
2 pF
Min
300
60
2400
Max.
0.14
0.26
-11
20
-9
Unit
mV
dB
dB
UI
UI
ps
ps
OCTOBER 2008
Notes
1
2
2
3
4
4

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