A54SX72A-CQ208 Actel, A54SX72A-CQ208 Datasheet

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A54SX72A-CQ208

Manufacturer Part Number
A54SX72A-CQ208
Description
A54SX72A-CQ208
Manufacturer
Actel
Datasheets

Specifications of A54SX72A-CQ208

Lead_time
140
Pack_quantity
1
Comm_code
85423990

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SX-A Family FPGAs
Leading-Edge Performance
Specifications
Features
Table 1 • SX-A Product Profile
February 2007
© 2007 Actel Corporation
Device
Capacity
Logic Modules
Maximum User I/Os
Global Clocks
Quadrant Clocks
Boundary Scan Testing
3.3 V / 5 V PCI
Input Set-Up (External)
Speed Grades
Temperature Grades
Package (by pin count)
Notes:
1. A maximum of 512 registers is possible if all 512 C cells are used to build an additional 256 registers.
2. All –3 speed grades have been discontinued.
Typical Gates
System Gates
PQFP
TQFP
PBGA
FBGA
CQFP
Combinatorial Cells
Dedicated Flip-Flops
Maximum Flip-Flops
• 250 MHz System Performance
• 350 MHz Internal Performance
• 12,000 to 108,000 Available System Gates
• Up to 360 User-Programmable I/O Pins
• Up to 2,012 Dedicated Flip-Flops
• 0.22 μ / 0.25 μ CMOS Process Technology
• Hot-Swap Compliant I/Os
• Power-Up/Down Friendly (No Sequencing Required
• 66 MHz PCI Compliant
• Nonvolatile, Single-Chip Solution
for Supply Voltages)
2
–F, Std, –1, –2
A54SX08A
C, I, A, M
100, 144
12,000
8,000
512
0 ns
768
512
256
130
208
144
Yes
Yes
3
0
1
–F, Std, –1, –2, –3
A54SX16A
C, I, A, M
• Configurable I/O Support for 3.3 V / 5 V PCI, 5 V
• 2.5 V, 3.3 V, and 5 V Mixed-Voltage Operation with
• Devices Support Multiple Temperature Grades
• Configurable Weak-Resistor Pull-Up or Pull-Down
• Individual Output Slew Rate Control
• Up to 100% Resource Utilization and 100% Pin
• Deterministic, User-Controllable Timing
• Unique In-System Diagnostic and Verification
• Boundary-Scan Testing in Compliance with IEEE
• Actel
100, 144
144, 256
16,000
24,000
1,452
0 ns
924
528
990
180
208
Yes
Yes
TTL, 3.3 V LVTTL, 2.5 V LVCMOS2
5 V Input Tolerance and 5 V Drive Strength
for I/O at Power-Up
Locking
Capability with Silicon Explorer II
Standard 1149.1 (JTAG)
FuseLock™ Prevents Reverse Engineering and
Design Theft
3
0
Secure
See the Actel website for the latest version of the datasheet.
–F, Std, –1, –2, –3
100, 144, 176
144, 256, 484
A54SX32A
Programming
C, I, A, M
208, 256
32,000
48,000
2,880
1,800
1,080
1,980
0 ns
249
208
Yes
Yes
329
3
0
Technology
–F, Std, –1, –2, –3
A54SX72A
C, I, A, M
256, 484
208, 256
108,000
72,000
6,036
4,024
2,012
4,024
0 ns
360
208
Yes
Yes
3
4
v 5 . 3
u
with
e
i

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