SST39VF6402B-70-4C-EK Silicon Storage Technology, Inc, SST39VF6402B-70-4C-EK Datasheet

SST39VF6402B-70-4C-EK

Manufacturer Part Number

SST39VF6402B-70-4C-EK

Description

Manufacturer

Silicon Storage Technology, Inc

Datasheets

1.SST39VF6401B.pdf (30 pages)

2.SST39VF6402B-70-4I-EK.pdf (30 pages)

3.SST39VF6402B-70-4I-EK.pdf (30 pages)

Specifications of SST39VF6402B-70-4C-EK

Case

TSOP48

Date_code

2006+

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FEATURES:

• Organized as 4M x16

• Single Voltage Read and Write Operations

• Superior Reliability

• Low Power Consumption (typical values at 5 MHz)

• Hardware Block-Protection/WP# Input Pin

• Sector-Erase Capability

• Block-Erase Capability

• Chip-Erase Capability

• Erase-Suspend/Erase-Resume Capabilities

• Hardware Reset Pin (RST#)

• Security-ID Feature

PRODUCT DESCRIPTION

The SST39VF640xB devices are 4M x16 CMOS Multi-

Purpose Flash Plus (MPF+) manufactured with SST’s pro-

prietary, high-performance CMOS SuperFlash technology.

The split-gate cell design and thick-oxide tunneling injector

attain better reliability and manufacturability compared with

alternate approaches. The SST39VF640xB write (Pro-

gram or Erase) with a 2.7-3.6V power supply. These

devices conform to JEDEC standard pin assignments for

x16 memories.

Featuring

SST39VF640xB devices provide a typical Word-Program

time of 7 µsec. These devices use Toggle Bit or Data# Poll-

ing to indicate the completion of Program operation. To pro-

tect against inadvertent write, they have on-chip hardware

and Software Data Protection schemes. Designed, manu-

factured, and tested for a wide spectrum of applications,

these devices are offered with a guaranteed typical endur-

ance of 100,000 cycles. Data retention is rated at greater

than 100 years.

The SST39VF640xB devices are suited for applications that

require convenient and economical updating of program,

S71288-02-000

– 2.7-3.6V

– Endurance: 100,000 Cycles (Typical)

– Greater than 100 years Data Retention

– Active Current: 9 mA (typical)

– Standby Current: 3 µA (typical)

– Auto Low Power Mode: 3 µA (typical)

– Top Block-Protection (top 32 KWord)

– Bottom Block-Protection (bottom 32 KWord)

– Uniform 2 KWord sectors

– Uniform 32 KWord blocks

– SST: 128 bits; User: 128 bits

for SST39VF6402B

for SST39VF6401B

high

64 Mbit (x16) Multi-Purpose Flash Plus

performance

7/06

SST39VF640xB2.7V 64Mb (x16) MPF+ memories

SST39VF6401B / SST39VF6402B

Word-Program,

the

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

• Fast Read Access Time:

• Latched Address and Data

• Fast Erase and Word-Program:

• Automatic Write Timing

• End-of-Write Detection

• CMOS I/O Compatibility

• JEDEC Standard

• Packages Available

• All non-Pb (lead-free) devices are RoHS compliant

configuration, or data memory. For all system applications,

they significantly improve performance and reliability, while

lowering power consumption. They inherently use less

energy during Erase and Program than alternative flash

technologies. The total energy consumed is a function of

the applied voltage, current, and time of application. Since

for any given voltage range, the SuperFlash technology

uses less current to program and has a shorter erase time,

the total energy consumed during any Erase or Program

operation is less than alternative flash technologies. These

devices also improve flexibility while lowering the cost for

program, data, and configuration storage applications.

The SuperFlash technology provides fixed Erase and Pro-

gram times, independent of the number of Erase/Program

cycles that have occurred. Therefore the system software

or hardware does not have to be modified or de-rated as is

necessary with alternative flash technologies, whose Erase

and Program times increase with accumulated Erase/Pro-

gram cycles.

To meet high-density, surface mount requirements, the

SST39VF640xB devices are offered in 48-lead TSOP and

48-ball TFBGA packages. See Figures 1 and 2 for pin

assignments.

– 70 ns

– 90 ns

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 40 ms (typical)

– Word-Program Time: 7 µs (typical)

– Internal V

– Toggle Bits

– Data# Polling

– Flash EEPROM Pin Assignments

– Software command sequence compatibility

– 48-lead TSOP (12mm x 20mm)

– 48-ball TFBGA (8mm x 10mm)

- Address format is 11 bits, A

- Block-Erase 6th Bus Write Cycle is 30H

- Sector-Erase 6th Bus Write Cycle is 50H

Generation

These specifications are subject to change without notice.

MPF is a trademark of Silicon Storage Technology, Inc.

-A

Data Sheet

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