MX29F400BTC-70 Macronix International Co., MX29F400BTC-70 Datasheet

MX29F400BTC-70

Manufacturer Part Number

MX29F400BTC-70

Description

Manufacturer

Macronix International Co.

Datasheet

1.MX29F400BTC-70.pdf (44 pages)

Specifications of MX29F400BTC-70

Case

TSOP48

Date_code

2006+

Current page: 1 of 44
Download datasheet (690Kb)

FEATURES

• 524,288 x 8/262,144 x 16 switchable

• Single power supply operation

• Fast access time: 55/70/90/120ns

• Low power consumption

• Command register architecture

• Auto Erase (chip & sector) and Auto Program

• Erase suspend/Erase Resume

• Status Reply

GENERAL DESCRIPTION

The MX29F400T/B is a 4-mega bit Flash memory orga-

nized as 512K bytes of 8 bits or 256K words of 16 bits.

MXIC's Flash memories offer the most cost-effective

and reliable read/write non-volatile random access

memory. The MX29F400T/B is packaged in 44-pin SOP,

48-pin TSOP. It is designed to be reprogrammed and

erased in system or in standard EPROM programmers.

The standard MX29F400T/B offers access time as fast

as 55ns, allowing operation of high-speed microproces-

sors without wait states. To eliminate bus contention,

the MX29F400T/B has separate chip enable (CE) and

output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality

with in-circuit electrical erasure and programming. The

MX29F400T/B uses a command register to manage this

functionality. The command register allows for 100%

P/N:PM0439

- 5.0V only operation for read, erase and program

operation

- 40mA maximum active current(5MHz)

- 1uA typical standby current

- Byte/word Programming (7us/12us typical)

- Sector Erase (Sector structure 16K-Bytex1, 8K-

Bytex2, 32K-Bytex1, and 64K-Byte x7)

- Automatically erase any combination of sectors with

Erase Suspend capability.

- Automatically program and verify data at specified

address

- Suspends an erase operation to read data from, or

program data to, another sector that is not being

erased, then resumes the erase.

- Data polling & Toggle bit for detection of program and

4M-BIT [512Kx8/256Kx16] CMOS FLASH MEMORY

• Ready/Busy pin (RY/BY)

• Sector protection

• 100,000 minimum erase/program cycles

• Latch-up protected to 100mA from -1V to VCC+1V

• Boot Code Sector Architecture

• Low VCC write inhibit is equal to or less than 3.2V

• Package type:

• Compatibility with JEDEC standard

• 20 years data retention

TTL level control inputs and fixed power supply levels

during erase and programming, while maintaining maxi-

mum EPROM compatibility.

MXIC Flash technology reliably stores memory contents

even after 100,000 erase and program cycles. The MXIC

cell is designed to optimize the erase and programming

mechanisms. In addition, the combination of advanced

tunnel oxide processing and low internal electric fields

for erase and program operations produces reliable cy-

cling. The MX29F400T/B uses a 5.0V±10% VCC sup-

ply to perform the High Reliability Erase and auto Pro-

gram/Erase algorithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

erase cycle completion.

- Provides a hardware method of detecting program or

erase cycle completion.

- Sector protect/unprotect for 5V only system or 5V/

12V system.

- Hardware method to disable any combination of

sectors from program or erase operations

- T = Top Boot Sector

- B = Bottom Boot Sector

- 44-pin SOP

- 48-pin TSOP

- Pinout and software compatible with single-power

supply Flash

MX29F400T/B

REV. 2.2 , NOV. 29, 2002

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