V53C16258LT40 Mosel-Vitelic, V53C16258LT40 Datasheet
V53C16258LT40
Manufacturer Part Number
V53C16258LT40
Description
Manufacturer
Mosel-Vitelic
Datasheet
1.V53C16258LK35.pdf
(20 pages)
Specifications of V53C16258LT40
Case
TSOP-40
Date_code
1998+
MOSEL VITELIC
Features
Device Usage Chart
V53C16258L Rev. 1.1 June 1999
HIGH PERFORMANCE
Max. RAS Access Time, (t
Max. Column Address Access Time, (t
Min. Fast Page Mode Cycle Time, (t
Min. Read/Write Cycle Time, (t
256K x 16-bit organization
EDO Page Mode for a sustained data rate
of 71 MHz
RAS access time: 35, 40, 45, 50 ns
Dual CAS Inputs
Low power dissipation
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, and Self Refresh
Optional Self Refresh (V53C16258SL)
Refresh Interval: Standard: 512 cycles/8ms
Available in 40-pin 400 mil SOJ and
40/44L-pin 400 mil TSOP-II packages
Single +3.3V 0.3V Power Supply
TTL Interface
Temperature
0 C to 70 C
Operating
Range
Package Outline
RAC
K
•
)
RC
)
V53C16258L
HIGH PERFORMANCE
3.3 VOLT 256K X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
OPTIONAL SELF REFRESH
PC
CAA
)
T
•
)
35
•
Access Time (ns)
40
•
1
Description
performance CMOS dynamic random access
memory. The V53C16258L offers Page mode with
Extended Data Output. An address, CAS and RAS
input capacitances are reduced to one quarter
when the x4 DRAM is used to construct the same
memory density. The V53C16258L has symmetric
address and accepts 512 cycle 8ms interval.
operation allows random access up to 512 x 16 bits,
within a page, with cycle times as short as 15ns.
variety of high performance portable computer
systems and peripheral applications.
35 ns
18 ns
14 ns
70 ns
The V53C16258L is a 262,144 x 16 bit high-
All inputs are TTL compatible. EDO Page Mode
The V53C16258L is ideally suited for a wide
35
45
•
50
•
40 ns
20 ns
15 ns
75 ns
40
Power
Std.
•
45 ns
22 ns
17 ns
80 ns
45
Temperature
Blank
Mark
50 ns
24 ns
19 ns
90 ns
50
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