K4S561633C-P1L SAMSUNG [Samsung semiconductor], K4S561633C-P1L Datasheet - Page 2

• Manufacturer Part Number: K4S561633C-P1L
• Description: 16Mx16 SDRAM 54CSP
• Manufacturer: SAMSUNG [Samsung semiconductor]

K4S561633C-R(B)L/N/P
4M x 16Bit x 4 Banks Synchronous DRAM in 54CSP
FEATURES
• 3.0V & 3.3V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation.
• DQM for masking
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25 C ~ 70 C).
• 54balls CSP (-RXXX - Pb, -BXXX - Pb Free)
FUNCTIONAL BLOCK DIAGRAM
clock.
Extended Temperature Operation ( -25 C ~ 85 C).
Inderstrial Temperature Operation ( -40 C ~ 85 C).
-. Burst length (1, 2, 4, 8 & Full page).
-. CAS latency (1 & 2 & 3).
-. Burst type (Sequential & Interleave).
ADD
CLK
LCKE
CLK
* Samsung Electronics reserves the right to change products or specification without notice.
LRAS
CKE
Bank Select
LCBR
CS
LWE
RAS
Timing Register
LCAS
CAS
GENERAL DESCRIPTION
Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabri-
cated with SAMSUNG's high performance CMOS technology. Syn-
chronous design allows precise cycle control with the use of
system clock and I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst length
and programmable latencies allow the same device to be useful for
a variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
-R(B)L ; Low Power, Operating Temp : -25 C ~ 70 C.
-R(B)N ; Low Power, Operating Temp : -25 C ~ 85 C.
-R(B)P : Low Power, Operating Temp : -40 C ~ 85 C.
1. In case of 40MHz Frequency, CL1 can be supported.
K4S561633C-R(B)L/N/P75
K4S561633C-R(B)L/N/P1H
K4S561633C-R(B)L/N/P1L 105MHz(CL=3)
Note :
The K4S561633C is 268,435,456 bits synchronous high data rate
Latency & Burst Length
Programming Register
WE
Data Input Register
Column Decoder
4M x 16
4M x 16
4M x 16
4M x 16
Part No.
L(U)DQM
LWCBR
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=2)
Max Freq.
CMOS SDRAM
Rev. 1.4 Dec. 2002
LDQM
*1
Interface Package
LVCMOS
LWE
LDQM
DQi
(Pb Free)
54 CSP
Pb