PEEL22CV10AZSI-25 ANACHIP [Anachip Corp], PEEL22CV10AZSI-25 Datasheet - Page 6
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PEEL22CV10AZSI-25
Manufacturer Part Number
PEEL22CV10AZSI-25
Description
CMOS Programmable Electrically Erasable Logic Device
Manufacturer
ANACHIP [Anachip Corp]
Datasheet
1.PEEL22CV10AZSI-25.pdf
(10 pages)
Anachip Corp.
www.anachip.com.tw
Zero Power Feature
The CMOS PEEL™22CV10AZ features “Zero-Power” standby
operation for ultra-low power consumption. With the “Zero-
Power” feature, transition-detection circuitry monitors the inputs,
I/Os (including CLK) and feedbacks. If these signals do not
change for a period of time greater than approximately two t
the outputs are latched in their current state and the device auto-
matically powers down. When the next signal transition is
detected, the device will “wake up” for active operation until the
signals stop switching long enough to trigger the next power-
down.
As a result of the “Zero-Power” feature, significant power sav-
ings can be realized for combinatorial or sequential operations
when the inputs or clock change at a modest rate (see Figure 23).
Figure 23 Typical ICC vs. Input Clock Frequency
for the 22CV10AZ.
0.001
0.01
100
0.1
10
0.001
1
0.01
22CV10AZ Frequency vs. ICC
Frequency in MHz
0.1
1
10
PD
s,
6/10
Design Security
The PEEL™22CV10AZ provides a special EEPROM security bit
that prevents unauthorized reading or copying of designs pro-
grammed into the device. The security bit is set by the PLD pro-
grammer, either at the conclusion of the programming cycle or as a
separate step, after the device has been programmed. Once the
security bit is set it is impossible to verify (read) or program the
PEEL™ until the entire device has first been erased with the
bulk-erase function.
Signature Word
The signature word feature allows a 64-bit code to be pro-
grammed
PEEL™22CV10AZ+ software option is used. The code can be
read back even after the security bit has been set. The signature
word can be used to identify the pattern programmed into the
device or to record the design revision, etc.
Programming Support
Anachip’s JEDEC file translator allows easy conversion of exist-
ing 24 pin PLD designs to the PEEL™22CV10AZ, without the
need for redesign. Anachip supports a broad range of popular
third party design entry systems, including the Abel-to-PEEL
Arrays fitter software. Anachip also offers (for free) its propri-
etary WinPLACE software, an easy-to-use entry level PC-based
software development system.
Programming support includes all the popular third party pro-
grammers such as BP Microsystems, System General, Logical
Devices, and numerous others.
into
the
PEEL™22CV10AZ
Rev. 1.0 Dec 16, 2004
if
the