W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 100
W6691CD
Manufacturer Part Number
W6691CD
Description
ISDN S/T Interface Transceiver
Manufacturer
WINBOND [Winbond]
Datasheet
1.W6691CD.pdf
(106 pages)
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Detailed PCM timing
Note : The PCM clocks are locked to the S/T receive clock. At every two or three PCM frame time (125 s),
PBCK and PFCK1, PFCK2 may be adjusted by one local oscillator cycle (130 ns) in order to synchronize with
S/T clock. This shift is made on the LOW level time of PBCK and the HIGH level time is not affected. This
introduces jitters on the PBCK, PFCK1 and PFCK2 with jitter amplitude 260 ns (peak-to-peak) and jitter
frequency about 2.67~4 kHz.
PARAMETER
ta1
ta2
ta3
ta4
ta5
ta6
ta7
ta8
PBCK
PTXD
PFCK1
PFCK2
PRXD
PBCK pulse high
PBCK pulse low
Frame clock asserted from
PBCK
PTXD data delay from PBCK
Frame clock deasserted from
PBCK
PTXD hold time from PBCK
PRXD setup time to PBCK
PRXD hold time from PBCK
PARAMETER DESCRIPTIONS
ta3
ta4
ta1 ta2
ta7
ta8
100
MIN.
195
10
20
10
NOMINAL
325
325
ta6
Preliminary W6691
Publication Release Date: Sep 2001
ta5
MAX.
455
20
20
20
REMARKS
Unit = nS
Revision 1.1
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