KMM5328004BSW SAMSUNG [Samsung semiconductor], KMM5328004BSW Datasheet - Page 17
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KMM5328004BSW
Manufacturer Part Number
KMM5328004BSW
Description
8M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.KMM5328004BSW.pdf
(19 pages)
DRAM MODULE
CAS-BEFORE-RAS REFRESH COUNTER TEST CYCLE
READ CYCLE
WRITE CYCLE
READ-MODIFY-WRITE
NOTE : This timing diagram is applied to all devices besides 64M DRAM based modules.
DQ
RAS
CAS
DQ
DQ
OE
OE
OE
W
W
W
A
V
V
V
V
I/OH
I/OL
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
t
t
t
t
WRP
WRP
WRP
CSR
t
t
t
WRH
WRH
WRH
t
CHR
t
CPT
t
ASC
t
t
RCS
WCS
t
t
RCS
ADDRESS
DS
COLUMN
t
t
CLZ
RAS
t
AA
DATA-OUT
t
VALID
CLZ
t
t
CAC
t
OEA
t
AWD
CAH
DATA-IN
t
WP
t
t
t
AA
CAC
CWL
t
t
t
OEA
CWD
WCH
t
t
t
OEZ
t
RAL
RWL
DH
DATA-IN
t
t
OED
VALID
CAS
KMM5328004BSW/BSWG
t
RSH
t
DS
t
DH
t
WP
DATA-OUT
t
RWL
t
CWL
t
t
OEZ
RCH
t
RRH
Don t care
Undefined
t
RP
t
t
CEZ
REZ
t
WEZ