KMM372C803CK SAMSUNG [Samsung semiconductor], KMM372C803CK Datasheet - Page 3
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KMM372C803CK
Manufacturer Part Number
KMM372C803CK
Description
8M x 72 DRAM DIMM with ECC using 8Mx8, 4K 8K Refresh, 5V
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.KMM372C803CK.pdf
(20 pages)
DRAM MODULE
GENERAL DESCRIPTION
The Samsung KMM372C80(8)3C is a 8Mx72bits Dynamic
RAM
KMM372C80(8)3C consists of nine CMOS 8Mx8bits DRAMs
in SOJ/TSOP-II 400mil packages and two 16 bits driver IC in
TSSOP package mounted on a 168-pin glass-epoxy sub-
strate. A 0.1 or 0.22uF decoupling capacitor is mounted on
the
KMM372C80(8)3C is a Dual In-line Memory Module and is
intended for mounting into 168 pin edge connector sockets.
PERFORMANCE RANGE
PIN CONFIGURATIONS
NOTE : A12 is used for only KMM372C883CK/CS (8K Ref.)
PD Note :PD & ID Terminals must each be pulled up through a resistor to V
ID Note : IDs will be either open (NC) or connected directly to V
KMM372C80(8)3CK/CS Fast Page Mode
8Mx72 DRAM DIMM with ECC Using 8Mx8, 4K & 8K Refresh, 5V
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Speed
-5
-6
printed
RSVD
RSVD
Front
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
CAS0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
high
V
V
V
V
V
V
W0
level assembly. PDs will be either open (NC) or driven to V
SS
CC
SS
CC
SS
CC
density
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
circuit
50ns
60ns
t
RAC
*CAS2
*CAS6
RSVD
RSVD
Front
RAS0
RAS2
CAS4
DQ18
DQ19
DQ20
DQ21
OE0
RFU
RFU
OE2
A10
A12
V
V
V
V
V
W2
A0
A2
A4
A6
A8
CC
CC
SS
SS
SS
memory
board
Pin
18ns
20ns
t
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
CAC
for
Front
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
RFU
RFU
RFU
RFU
PD1
PD3
PD5
PD7
V
V
V
V
V
module.
ID0
CC
SS
CC
SS
CC
each
110ns
90ns
100
101
102
103
104
105
106
107
108
109
110
111
112
t
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
RC
The
*CAS1
RSVD
RSVD
DRAM.
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
Back
RFU
V
V
V
V
V
V
CC
CC
CC
SS
SS
SS
Samsung
35ns
40ns
t
PC
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Pin
SS
The
without a buffer.
SS
*CAS3
*RAS1
*RAS3
*CAS5
*CAS7
RSVD
RSVD
DQ54
DQ55
DQ56
DQ57
Back
*A13
RFU
RFU
RFU
PDE
A11
V
V
V
V
V
A1
A3
A5
A7
A9
B0
via on-board buffer circuits.
SS
CC
SS
CC
SS
CC
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Pin
at the next higher
FEATURES
•
• Fast Page Mode Operation
• CAS-before-RAS Refresh capability
• RAS-only and Hidden refresh capability
• TTL compatible inputs and outputs
• Single 5V 10% power supply
• JEDEC standard pinout & Buffered PDpin
• Buffered input except RAS and DQ
• PCB : Height(1250mil), single sided component
KMM372C803CK
KMM372C803CS
KMM372C883CK
KMM372C883CS
Part Identification
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ64
DQ65
DQ66
DQ67
DQ68
DQ69
DQ70
DQ71
Back
Part number
RFU
RFU
RFU
RFU
PD2
PD4
PD6
PD8
V
V
V
V
V
ID1
CC
SS
CC
SS
CC
PIN NAMES
Pins marked * are not used in this module.
PD & ID Table
PD : 0 for Vol of Drive IC & 1 for N.C
ID : 0 for Vss & 1 for N.C
Pin Names
A0, B0, A1 - A11
A0, B0, A1 - A12
DQ0 - DQ71
W0, W2
OE0, OE2
RAS0, RAS2
CAS0, CAS4
V
V
NC
PDE
PD1 - 8
ID0 - 1
RSVD
RFU
CC
SS
KMM372C80(8)3CK/CS
TSOP
TSOP
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
Pin
ID0
ID1
PKG
SOJ
SOJ
Ref.
4K
8K
50NS
Function
Address Input(4K ref.)
Address Input(8K ref.)
Data In/Out
Read/Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power(+5V)
Ground
No Connection
Presence Detect Enable
Presence Detect
ID bit
Reserved Use
Reserved for Future Use
CBR Ref.
4K/64ms
1
0
1
1
0
0
0
0
0
0
4K/64ms
ROR Ref.
8K/64ms
60NS
1
0
1
1
0
1
1
0
0
0