KMM372F400CK SAMSUNG [Samsung semiconductor], KMM372F400CK Datasheet - Page 5
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KMM372F400CK
Manufacturer Part Number
KMM372F400CK
Description
4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.KMM372F400CK.pdf
(20 pages)
DRAM MODULE
Test condition : V
AC CHARACTERISTICS
RAS to W dealy time
Column address to W delay time
CAS precharge time to W delay time
CAS set-up time(CAS-before-RAS refresh)
CAS hold time(CAS-before-RAS refresh)
RAS to CAS precharge time
CAS precharge time (C-B-R counter test cycle)
Access time from CAS precharge
Hyper page cycle time
Hyper page read-modify-write cycle time
CAS precharge time(Hyper page cycle)
RAS pulse width (Hyper page cycle)
RAS hold time from CAS precharge
OE access time
OE to data delay
Output buffer turn off delay time from OE
OE command hold time
W to RAS precharge time(C-B-R refresh)
W to RAS hold time(C-B-R refresh)
Output data hold time
Output buffer turn off delay time from RAS
Output buffer turn off delay time from W
W to data delay
OE to CAS hold time
CAS hold time to OE
OE precharge time
PDE to Valid PD bit
PDE to PD bit Inactive
W pulse width(Hyper page cycle)
Present Detect Read Cycle
ih
/V
Parameter
il
=2.0/0.8V, V
oh
(0 C T
/V
ol
=2.0/0.8V, Output loading CL=100pF
A
70 C, V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
RWD
AWD
CPWD
CSR
CHR
RPC
CPT
CPA
HPC
HPRWC
CP
RASP
RHCP
OEA
OED
OEZ
OEH
WRP
WRH
DOH
REZ
WEZ
WED
OCH
CHO
OEP
WPE
PD
PDOFF
CC
=3.3V 0.3V. See notes 1,2.)
Min
71
48
53
20
25
68
50
35
18
13
15
10
20
5
8
3
8
5
8
3
3
5
5
5
5
2
-5
200K
Max
33
18
18
13
18
10
7
Min
83
55
60
20
30
77
10
60
40
20
15
15
10
20
5
8
3
5
8
3
3
5
5
5
5
2
KMM372F400CK/CS
KMM372F410CK/CS
-6
200K
Max
40
20
20
15
20
10
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6,11,14
6.11.12
6.11.14
Note
7,14
3,14
14
14
14
12
12
14
14
14
14
14
14
14
7