54F74FM NSC [National Semiconductor], 54F74FM Datasheet - Page 2

• Manufacturer Part Number: 54F74FM
• Description: Dual D-Type Positive Edge-Triggered Flip-Flop
• Manufacturer: NSC [National Semiconductor]

Connection Diagrams
Unit Loading Fan Out
Truth Table
Logic Diagram
D
CP
C
S
Q
D1
D1
Pin Names
1
1
S
H
H
H
H
L
L
1
D
D
Q
S
CP
C
2
1
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
D2
D2
Q
2
2
Q
C
H
H
H
H
L
L
2
D
for DIP SOIC and Flatpak
Inputs
Data Inputs
Clock Pulse Inputs (Active Rising Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
Pin Assignment
CP
X
X
X
L
Description
D
X
X
X
h
X
l
Q
Q
H
H
H
L
L
0
Outputs
TL F 9469–1
Q
Q
H
H
H
L
L
0
HIGH LOW
2
50 33 3
1 0 1 0
1 0 1 0
1 0 3 0
1 0 3 0
U L
H (h)
L (l)
X
Q
Lower case letters indicate the state of the referenced input or output one
setup time prior to the LOW-to-HIGH clock transition
0
e
e
e
Immaterial
e
Previous Q (Q) before LOW-to-HIGH Clock Transition
LOW Voltage Level
54F 74F
HIGH Voltage Level
20 A
20 A
20 A
20 A
Output I
b
Input I
1 mA 20 mA
b
b
b
b
IH
OH
0 6 mA
0 6 mA
1 8 mA
1 8 mA
Pin Assignment
I
IL
I
OL
for LCC
TL F 9469 – 5
TL F 9469– 2