K6R1016C1C SAMSUNG [Samsung semiconductor], K6R1016C1C Datasheet
K6R1016C1C
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K6R1016C1C Summary of contents
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... I 12ns CC 15ns 20ns Rev. 2.0 Add 48-fine pitch BGA. Rev. 2.1 Changed device part name for FP-BGA. Item Symbol ex) K6R1016C1C-Z -> K6R1016C1C-F Rev. 2.2 Changed device ball name for FP-BGA. Previous I/O1 ~ I/O8 I/O9 ~ I/O16 Rev. 3.0 Added Data Retention Characteristics. Rev. 3.1 Add 10ns part. Rev. 4.0 Delete 20ns speed bin The attached data sheets are prepared and approved by SAMSUNG Electronics ...
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... The K6R1016C1C is a 1,048,576-bit high-speed Static Random Access Memory organized as 65,536 words by 16 bits. The K6R1016C1C uses 16 common input and output lines and has at output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (UB, LB) ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P PIN CONFIGURATION(TOP VIEW SOJ/ I Vcc 11 34 TSOP2 Vss ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P DC AND OPERATING CHARACTERISTICS* Parameter Symbol Input Leakage Current I LI Output Leakage Current I LO Operating Current I CC Standby Current SB1 Output Low Voltage Level Output High Voltage Level V ** OH1 * The above parameters are also guaranteed at industrial temperature range. ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P READ CYCLE* Parameter Symbol Read Cycle Time t RC Address Access Time t AA Chip Select to Output t CO Output Enable to Valid Output t OE UB, LB Access Time t BA Chip Enable to Low-Z Output t LZ UB, LB Enable to Low-Z Output t BLZ Output Enable to Low-Z Output ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P TIMING WAVEFORM OF READ CYCLE(2) Address CS UB Data out High Current SB NOTES(READ CYCLE high for read cycle. 2. All read cycle timing is referenced from the last valid address to the first transition address and t are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P TIMING WAVEFORM OF WRITE CYCLE(2) Address CS UB Data in Data out TIMING WAVEFORM OF WRITE CYCLE(3) Address CS UB High-Z Data in High-Z Data out (OE =Low fixed CW( WP1(2) AS( High-Z Valid Data t WHZ(6) High-Z (CS=Controlled CW( ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P TIMING WAVEFORM OF WRITE CYCLE(4) Address CS UB High-Z Data in High-Z Data out NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address write occurs during the overlap of a low CS, WE, LB and UB. A write begins at the latest transition CS going low and WE going low ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P DATA RETENTION CHARACTERISTICS* Parameter Symbol V for Data Retention CC Data Retention Current Data Retention Set-Up Time Recovery Time * The above parameters are also guaranteed at industrial temperature range. Data Retention Characteristic is for L-ver only. DATA RETENTION WAVE FORM CS controlled ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P PACKAGE DIMENSIONS 44-SOJ-400 #44 11.18 0.12 0.440 0.005 #1 +0.10 0.43 -0.05 +0.004 0.95 0.017 ( ) -0.002 0.0375 44-TSOP2-400BF #44 #1 18.81 MAX 0.741 18.41 0.10 0.725 0.004 0.10 0.30 0.05 0.805 ( ) 0.004 0.012 0.032 0.002 #23 #22 28.98 MAX 1.141 25.58 0.12 1.125 0.005 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 0.25 0.010 TYP #23 11.76 0.20 0.463 0.008 #22 1.00 1.20 0.10 MAX 0.039 0.047 0.004 0.10 MAX 0.05 0.004 MIN 0 ...
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... K6R1016C1C-C/C-L, K6R1016C1C-I/C-P PACKAGE OUTLINE Top View B #A1 Side View D C Min Typ A - 0.75 B 5.90 6. 3.75 C 6.90 7. 5.25 D 0. 0.80 E2 0.20 0. Bottom View Detail A Max - Notes. 6.10 1. Bump counts: 48(8row x 6column) 2. Bump pitch : (x,y)=(0.75 x 0.75)(typ All tolerence are +/-0.050 unless 7 ...