A42L0616S-50 AMICC [AMIC Technology], A42L0616S-50 Datasheet

no-image

A42L0616S-50

Manufacturer Part Number
A42L0616S-50
Description
1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
Manufacturer
AMICC [AMIC Technology]
Datasheet
Preliminary
Document Title
Revision History
PRELIMINARY
1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
Rev. No.
0.0
0.1
0.2
(June, 2002, Version 0.2)
History
Initial issue
Delete -60 grade and modify AC, DC data
Add -U type spec.
Modify DC data and all parts guarantee self-refresh mode
1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
Issue Date
June 13, 2001
November 30, 2001
June 10, 2002
A42L0616 Series
AMIC Technology, Inc.
Remark
Preliminary

Related parts for A42L0616S-50

A42L0616S-50 Summary of contents

Page 1

Preliminary CMOS DYNAMIC RAM WITH EDO PAGE MODE Document Title CMOS DYNAMIC RAM WITH EDO PAGE MODE Revision History Rev. No. History 0.0 Initial issue 0.1 Delete -60 grade and modify AC, DC data ...

Page 2

Preliminary CMOS DYNAMIC RAM WITH EDO PAGE MODE Features n Organization: 1,048,576 words X 16 bits n Part Identification - A42L0616 (1K Ref.) n Single 3.3V power supply/built-in VBB generator n Low power consumption - Operating: 110mA ...

Page 3

Selection Guide Symbol t RAC Maximum RAS Access Time t Maximum Column Address Access Time AA t CAC Maximum CAS Access Time t OEA Maximum Output Enable ( OE ) Access Time t Minimum Read or Write Cycle Time RC ...

Page 4

Block Diagram RAS Control UCAS Clocks LCAS WE Refresh Timer Refresh control Refresh Counter Row Address Buffer A0~A9 Col. Address Buffer A0~A9 Recommended Operating Conditions Symbol Description VCC Power Supply VSS Input High Voltage V Input High Voltage IH V ...

Page 5

Truth Table Function RAS Standby Read: Word Read: Lower Byte Read: Upper Byte Write: Word Write: Lower Byte Write: Upper Byte Read-Write EDO-Page-Mode Read: Hi-Z -First cycle -Subsequent Cycles EDO-Page-Mode Write -First cycle -Subsequent Cycles EDO-Page-Mode Read-Write -First cycle -Subsequent ...

Page 6

Absolute Maximum Ratings* Input Voltage (Vin -0.5V to +4.6V Output Voltage (Vout ...

Page 7

AC Characteristics (VCC = 3.3V Test Conditions: Input timing reference level Output reference level =2.0V/0. Output Load: 2TTL gate + CL (50pF) Assumed t =2ns T Std # Symbol t Transition Time (Rise ...

Page 8

AC Characteristics (continued) Test Conditions: Input timing reference level Output reference level =2.0V/0. Output Load: 2TTL gate + CL (50pF) Assumed t =2ns T Std # Symbol 20 t RRH Read Command Hold ...

Page 9

AC Characteristics (continued) Test Conditions: Input timing reference level Output reference level =2.0V/0. Output Load: 2TTL gate + CL (50pF) Assumed t =2ns T Std # Symbol 39 t AWD Column Address to ...

Page 10

Notes and I depend on cycle rate. CC1 CC3 CC4 CC5 2. I and I depend on output loading. Specified values are obtained with the outputs open. CC1 CC4 3. An initial pause ...

Page 11

Word Read Cycle RAS t CRP(9) UCAS LCAS t t ASR(10) RAH(11) Address Row Address I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RC(1) t RAS(3) t CSH(8) t RCD( RAD(6) RAL(21) ...

Page 12

Word Write Cycle (Early Write) RAS t CRP(9) UCAS LCAS t t ASR(10) RAH(11) Row Address Address I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RC(1) t RAS(3) t CSH( RCD(5) RSH(7) t ...

Page 13

Word Write Cycle ( Late Write) RAS t CRP(9) UCAS LCAS t t ASR(10) RAH(11) Row Address Address I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RC(1) t RAS(3) t CSH(8) t RCD(5) t CAS(4) ...

Page 14

Word Read-Modify-Write Cycle RAS t CRP(9) UCAS LCAS t ASR(10) t RAH(11) Address Row Address I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RWC(36) t RAS(3) t CSH(8) t RCD(5) t AR(17) t RAD(6) t ...

Page 15

EDO Page Mode Word Read Cycle RAS t CRP(9) UCAS LCAS t t ASR(10) RAH(11) Row Address I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RASP(47) t CSH(8) t RCD(5) t CP(44) t CAS(4) t ...

Page 16

EDO Page Mode Early Word Write Cycle RAS t CRP(9) UCAS LCAS t t RAH(11) ASR(10) Address Row I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RASP(47) t CSH(8) t RCD( CAS(4) CP(44) ...

Page 17

EDO Page Mode Word Read-Modify-Write Cycle RAS t CRP(9) UCAS LCAS t RAD( RAH(11) ASR(10) Address Row High-Z I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RASP(47) t CSH(8) t RCD( ...

Page 18

RAS Only Refresh Cycle RAS t CRP(9) UCAS LCAS t ASR(10) Row Address Note: WE Don't care. CAS Before RAS Refresh Cycle t RP(2) RAS t RPC(50) t CP(44) UCAS LCAS t OFF(23) I I/O 15 ...

Page 19

Hidden Refresh Cycle (Word Read) RAS t CRP(9) UCAS LCAS t RAD(6) t ASR(10 Row A0~A8 t RCS(18 High-Z I I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RC(1) t RAS(3) t AR(17) t ...

Page 20

Hidden Refresh Cycle (Early Word Write) RAS t CRP(9) UCAS LCAS t ASR(10) Row Address t WCS(27 I I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RC(1) t RAS(3) t AR(17 RSH(7) RCD(5) t ...

Page 21

EDO Page Mode Read-Early-Write Cycle (Pseudo Read-Modify-Write) RAS t t RCD(5) CRP(9) UCAS LCAS t RAD( RAH(11) ASC(24) t ASR(10) Row Address t RCS(18 I I/O 15 PRELIMINARY (June, 2002, Version 0.2) t RASP(47) ...

Page 22

Self Refresh Mode t RP(2) RAS t RPC(50) UCAS LCAS t CP(44 OFF(23) I I/O 15 Note: WE Don't care. n Self Refresh Mode. a. Entering the Self Refresh Mode: The A42L0616 ...

Page 23

... SOJ 42L (400mil) TSOP 44/50L type II (400mil) TSOP 44/50L type II (400mil) Note for industrial operating temperature range. PRELIMINARY (June, 2002, Version 0.2) 0.3%) Parameter Input Capacitance I/O Capacitance 45ns 50ns A42L0616S-45 A42L0616S-50 A42L0616V-45 A42L0616V-50 A42L0616V-45U A42L0616V-50U 22 A42L0616 Series Max. Unit Test Conditions 5 pF Vin = 0V ...

Page 24

Package Information (400mil) SOJ 42L Outline Dimensions Seating Plane Symbol Notes: 1. The maximum value of dimension D ...

Page 25

Package Information (400mil) TSOP 44/50L (Type II) Outline Dimensions Seating Plane Symbol Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes ...

Related keywords