SFSL5.5MDB YAMAR [Yamar Electronics Ltd.], SFSL5.5MDB Datasheet - Page 5

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SFSL5.5MDB

Manufacturer Part Number
SFSL5.5MDB
Description
Smart Slave for DC-BUS Powerline Network
Manufacturer
YAMAR [Yamar Electronics Ltd.]
Datasheet
3.1 Power Signals
PD – Pull down resistor 100K ohm ±%30
PU – Pull up resistor 100K ohm ±%30
Vdd and Gnd layout traces should be as wide as possible. It is recommended to connect a 0.1uF
capacitor between each Vdd and ground pins, as close as possible to the pins.
Analog Vdd pin, AVdd, should be connected to Vdd. AGnd should be connected to ground. The Analog
supply has to be sufficiently powerful (capable of current driving), to avoid any fluctuations of supply
voltage level. It is recommended to keep the lines connecting the 3.3V power supply to Vdd pins as
short as possible with wide PCB traces.
© 2010 Yamar Electronics Ltd.
Preliminary and proprietary Information of YAMAR Electronics Ltd. Subject to change without notice.
F0F1-0
F0F1-1
F0F1-2
F0F1-3
BitRate0
BitRate1
NC
Mode2
Mode3
Mode4
AutoFreqCh
AutoSleep
F1nF0
Gnd
Vdd
AGnd
AVdd
Exp
6,7,33,
34,43,
46,51
4,11,
Exp
57
54
60
49 Input PD Frequency selection pins. See 4.2.
50 Input PD Frequency selection pins. See 4.2.
55 Input PD Frequency selection pins. See 4.2.
56 Input PD Frequency selection pins. See 4.2.
48 Input PD
62 Input PD
36 Input PD
64 Input PD
30 Input PD
38 Input PD Selects between F0 / F1. HIGH – F1, LOW – F0
1 Input PD Bit rate selection pins. See 4.3.
2 Input PD Bit rate selection pins. See 4.3.
5
Power
Power
Power
Power
---
Figure 3.2 - Recommended AVdd circuitry
Not connected.
Should be left unconnected.
Should be connected to Vdd.
Should be connected to Vdd
Automatic Frequency Change. When HIGH, the device automatically
switches frequency after about 4 seconds without bus activity.
When this pin is set to HIGH, the device will automatically enter sleep
mode after about 8 seconds without bus activity.
Ground
3.3V power supply.
Analog Ground
3.3V Analog Power. Separate from Vdd with a 10 Ohm resistor and bypass
to Ground with 1nF and 10nF capacitor.
May be connected to GND
Vdd
Table 3.1 - Device signals
R3
C5
1n
5
10
10n
C6
Power signals
AVdd
DS-SIG61 R0.932

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