HDSP-2301 HP [Agilent(Hewlett-Packard)], HDSP-2301 Datasheet - Page 13

• Manufacturer Part Number: HDSP-2301
• Description: Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays
• Manufacturer: HP [Agilent(Hewlett-Packard)]

transistors. Note that the display
is blanked via the V
also that the column driver tran-
sistors are turned off during the
time that new data is being loaded
into the HDSP-2000 display string.
This will eliminate any high cur-
rent transients between the
column inputs and ground during
the data shifting operation.
Since data is loaded for all of the
like columns in the display string
and these columns are then en-
abled simultaneously, only five
column switch transistors are re-
quired regardless of the number
of characters in the string. The
column switch transistors should
be selected to handle 105 to 130
mA per character in the display
string. The collector emitter satu-
ration voltage characteristics and
column voltage supply should be
chosen to provide 2.4 V
V
and 2.75 V
high efficiency red, yellow, and
high performance green displays.
To save on power supply costs
and improve efficiency, this sup-
ply may be a fullwave rectified
unregulated DC voltage as long
as the PEAK value does not ex-
ceed the value of V
minimum value does not drop be-
low 2.4 V or 2.75 V depending on
display color.
Figures 13 and 16 show practical
implementations of the block dia-
gram shown in Figure 2. In those
circuits, the display is mounted
upside down, so that pin 1 is in
the upper right hand corner. With
this technique, data is loaded into
display character N and data
shifts from right to left as new
data is loaded. The first bit loaded
into the display would be row 1,
character 1, then row 2, etc., and
the last bit loaded would be row 7
CC
for the standard red displays
V
COL
CC
B
V
input and
CC
and the
for the
V
COL
of character N. This allows the 7,
mented as up counters instead of
down counters. Since the display
is upside down, column 5 of the
display appears to be column 1
and column 4 of the display ap-
pears to be column 2. Thus,
column 1 data for the display
must be loaded into the display
and column 5 must subsequently
be enabled. This is accomplished
by reversing the outputs of the 5 x
7 decoder. The D
D
coder output column 5, column 4,
column 3, column 2, and column 1
information.
Interfacing the
HDSP-2000 Display to
Microprocessors
Because of the complexity of
dealing with alphanumeric infor-
mation, a microprocessor based
system is typically used in con-
junction with the HDSP-2000
family displays. Depending upon
overall systems configuration, mi-
croprocessor time available to
dedicate to display support, and
the type of information to be dis-
played, one may choose several
different partitioning schemes to
drive such a display.
Figure 3 shows four different
techniques to interface the HDSP-
200 family displays to
microprocessor systems:
1. The REFRESH CONTROLLER
2. The DECODED DATA CON-
N and M counters to be imple-
4
interrupts the microprocessor
at a 500 Hz rate to request re-
fresh data for the display.
TROLLER accepts 5 x 7 matrix
data from the microprocessor
and then automatically re-
freshes the display with the
outputs of the MCM6674 de-
0
, D
1
, D
2
, D
3
, and
3. The CODED DATA CONTROL-
4. The DISPLAY PROCESSOR
The interface techniques depicted
are specifically for the 8080A or
6800 microprocessor families.
Extension of these techniques to
other processors should be a
relatively simple software chore
with little or no hardware
changes required.
The choice of a particular inter-
face is an important consideration
because it affects the design of
the entire microprocessor system.
The REFRESH CONTROLLER
provides the lowest cost interface
because it uses the microproces-
sor to provide ASCII decoding and
display strobing. Because the
ASCII decoder is located within
the microprocessor system, the
designer has total control over the
display font within the program.
This feature is particularly impor-
tant when the system will be used
to display different languages
and special graphic symbols.
However, the REFRESH CON-
TROLLER requires a significant
amount of microprocessor time.
Furthermore, while the interrupt
allows the refresh program to
operate asynchronously from the
main program, this technique
5
same information until
new data is supplied by
the microprocessor.
LER accepts ASCII data and
interfaces like a RAM to the
microprocessor.
CONTROLLER (HDSP-247X
series) employs a dedicated
single chip microprocessor as
a data display/control/key-
board interface which has
many of the features of a
complete terminal.