EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 13
EM78451AP
Manufacturer Part Number
EM78451AP
Description
8-Bit Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
1.EM78451AP.pdf
(54 pages)
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Product Specification (V1.2) 05.27.2004
(This specification is subject to change without further notice)
CES (bit 7): Clock Edge Select bit
1 = Data shifts out on falling edge, and shifts in on rising edge. Data is on hold during
high level.
0 = Data shifts out on rising edge, and shifts in on falling edge. Data is on hold during
low level.
SPIE (bit 6): SPI Enable bit
1= Enable SPI mode
0= Disable SPI mode
SRO (bit 5): SPI Read Overflow bit
1 = A new data is received while the previous data is still being held in the SPIB
register. In this situation, the data in SPIS register will be destroyed. To avoid setting
this bit, users are required to read the SPIRB registers although only the transmission
has been implemented.
0 = No overflow.
SSE (bit 4): SPI Shift Enable bit
1 = Start to shift, and keep on 1 while the current byte is still being transmitted.
0 = Reset as soon as the shifting is complete, and the next byte is ready to shift.
SBRS (bit 2~bit 0): SPI Baud Rate Select bits
SPI baud rate table is illustrated in the SPI section of this specification.
4.1.12 RE (TMR1: Timer1 register)
TMR17~TMR10 is bit sets of timer1 register and it increases until the value matches
PWP and then it resets to 0.
Address
0X0E
TMR1/RE
Name
This bit will reset to 0 at every one-byte transmission by the hardware
TMR17 TMR16 TMR15 TMR14 TMR13 TMR12 TMR11
Bit 7
Bit 6
This can only occur in slave mode.
Bit 5
NOTE
NOTE
Bit 4
Bit 3
Bit 2
8-Bit Microcontroller
Bit 1
EM78451
TMR10
Bit 0
• 9
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