NJ8821BADP GEC [General Electric Company], NJ8821BADP Datasheet

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NJ8821BADP

Manufacturer Part Number
NJ8821BADP
Description
FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE) WITH RESETTABLE COUNTERS
Manufacturer
GEC [General Electric Company]
Datasheet
1.NJ8821BADP.pdf (5 pages)
CMOS process and is capable of achieving high sideband
attenuation and low noise performance. It contains a reference
oscillator, 11-bit programmable reference divider, digital and
sample-and-hold comparators, 10-bit programmable ‘M’ counter,
7-bit programmable ‘A’ counter and the necessary control and
latch circuitry for accepting and latching the input data.
from a suitable microprocessor..
prescaler such as the SP8710 series to produce a universal
binary coded synthesiser.
Plastic DIL (MP) packages, both with operating temperature
range of 230 C to 170 C. The NJ8821MA is available only in
Ceramic DIL package with operating temperature range of
240 C to 185 C.
FEATURES
ORDERING INFORMATION
NJ8821 BA DP Plastic DIL Package
NJ8821 BA MP Miniature Plastic DIL Package
NJ8821 MA DG Ceramic DIL Package
The NJ8821 is a synthesiser circuit fabricated on the GPS
Data is presented as eight 4-bit words under external control
It is intended to be used in conjunction with a two-modulus
The NJ8821 is available in Plastic DIL (DP) and Miniature
Low Power Consumption
Microprocessor Compatible
High Performance Sample and Hold Phase Detector
>10MHz Input Frequency
INPUTS
ENABLE (PE)
DATA
PROGRAM
OSC OUT
FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE)
OSC IN
V
V
F
D0
D1
D2
D3
DD
SS
IN
14
7
8
9
10
11
12
4
6
5
WITH RESETTABLE COUNTERS
LATCH SELECT
LATCH 4 LATCH 5
LATCH 6 LATCH 7 LATCH 8
‘A’ COUNTER
REFERENCE COUNTER
LOGIC
(7 BITS)
(11BITS)
CONTROL LOGIC
DATA SELECT INPUTS
NJ8821
Fig.2 Block diagram
DS0 DS1 DS2
15
LATCH 1 LATCH 2 LATCH 3
16
‘M’ COUNTER
(10 BITS)
17
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
Input voltage
Storage temperature
Storage temperature
Open drain output, pin 3
All other pins
42
INTERNAL
LATCHES
TO
OSC OUT
Fig.1 Pin connections - top view
OSC IN
f
f
r
v
PDA
PDB
V
DD
V
F
LD
DD
D0
D1
SS
IN
2V
1
2
3
4
5
6
7
8
9
10
SS
RB
SAMPLE/HOLD
NJ8821
FREQUENCY/
19
DETECTOR
DETECTOR
PHASE
(DP and MP packages, NJ8821)
PHASE
(DG package, NJ8821MA)
20
19
18
17
16
15
14
13
12
11
CH
20
V
V
SS
CH
RB
MC
DS2
DS1
DS0
PE
NC
D3
D2
SS
18
1
2
3
20·3V to V
265 C to 1150 C
255 C to 1125 C
PDA
PDB
LOCK DETECT (LD)
MODULUS
CONTROL
OUTPUT (MC)
DP20, MP20
20·5V to 7V
DG20
NJ8821
DS3278-1.3
DD
10·3V
7V

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NJ8821BADP Summary of contents

Page 1

FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE) The NJ8821 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance. It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold ...

Page 2

NJ8821 ELECTRICAL CHARACTERISTICS AT V Test conditions unless otherwise stated: V –V =5V 0·5V. Temperature range NJ8821 BA: – +70 C; NJ8821MA: – + Characteristics Characteristic Supply current OUTPUT LEVELS Modulus Control ...

Page 3

PIN DESCRIPTIONS Pin no. Name 1 PDA Analog output from the sample and hold phase comparator for use as a ‘fine’ error signal. Output decreases gain (programmed by RB). PDB 2 Three-state ...

Page 4

NJ8821 PROGRAMMING Timing is generated externally, normally from a microprocessor, and allows the user to change the data in selected latches as defined by the data map Fig.5. The PE pin is used as a strobe for the data: taking ...

Page 5

HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire SN2 2QW, United Kingdom. Tel: (0793) 518000 Fax: (0793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017 1500 Green Hills Road, Scotts Valley, California 95067-0017, United States of America. Tel: (408) 438 ...

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