IW4020BN IKSEMICON [IK Semicon Co., Ltd], IW4020BN Datasheet

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IW4020BN

Manufacturer Part Number
IW4020BN
Description
14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS
Manufacturer
IKSEMICON [IK Semicon Co., Ltd]
Datasheet
14 Stage Ripple-Carry Binary
Counter/Divider
High-Voltage Silicon-Gate CMOS
slave flip-flops. The state of a counter advances one count on the negative
transition of each input pulse; a high level on the RESET line resets the counter
to its all zeros state. Schmitt trigger action on the input-pulse line permits
unlimited rise and fall times.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 μA at 18 V over full package-temperature
• Noise margin (over full package temperature range):
The IW4020B is ripple-carry binary counter. All counter stages are master-
range; 100 nA at 18 V and 25°C
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
CLOCK
RESET
LOGIC DIAGRAM
10
11
PIN 8 = GND
PIN 16 =V
CC
9
7
4
6
5
1
13
12
14
15
2
3
Q12
Q13
Q11
Q14
Q4
Q5
Q7
Q1
Q6
Q8
Q10
Q9
H= high level
L = low level
X=don’t care
Clock
X
Inputs
FUNCTION TABLE
16
T
PIN ASSIGNMENT
A
ORDERING INFORMATION
Reset
IW4020BN Plastic DIP
IW4020BD SOIC
= -55° to 125° C for all packages
TECHNICAL DATA
L
L
H
IW4020B
16
1
All Outputs are low
Advance to next
Output state
1
No change
Output
Rev. 00
state
PLASTIC DIP
N SUFFIX

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IW4020BN Summary of contents

Page 1

... CC H= high level L = low level X=don’t care TECHNICAL DATA IW4020B N SUFFIX PLASTIC DIP ORDERING INFORMATION IW4020BN Plastic DIP IW4020BD SOIC T = -55° to 125° C for all packages A PIN ASSIGNMENT Output Reset Output state L No change Advance to next L state ...

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MAXIMUM RATINGS Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) OUT I DC Input Current, per Pin IN P Power Dissipation in Still ...

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DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Minimum High-Level IH Input Voltage V Maximum Low -Level IL Input Voltage V Minimum High-Level OH Output Voltage V Maximum Low-Level OL Output Voltage I Maximum Input Leakage IN Current I Maximum Quiescent CC ...

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AC ELECTRICAL CHARACTERISTICS Symbol Parameter f Maximum Clock Frequency (Figure 1) max Maximum Propagation Delay, Clock to Q1 PLH PHL (Figure Maximum Propagation Delay, Q PLH PHL t Maximum Propagation Delay, Reset to ...

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Clock Reset Q10 Q11 Q12 Q13 Q14 EXPANDED LOGIC DIAGRAM CLOCK RESET Figure 3. Switching Waveforms TIMING DIAGRAM 128 256 512 1024 Q1 Q2 CL1 CL3 ...

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- 0.25 (0.010 NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. A ...

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