MA007AD MEGAWIN [Megawin Technology Co., Ltd], MA007AD Datasheet - Page 2

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MA007AD

Manufacturer Part Number
MA007AD
Description
3-in-1 8-bit serial to parallel latch
Manufacturer
MEGAWIN [Megawin Technology Co., Ltd]
Datasheet

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General Description
The MA007 are high-speed Si-gate CMOS
devices. There are three groups 8-stage serial
shift register with a storage register and 3-state
outputs in MA007. The shift register and storage
register have separate clocks. Data is shifted on
the positive-going transitions of the SCLK input.
The data in each register is transferred to the
storage register on a positive-going transition of
the PCLK input. If both clocks are connected
Pad Description
2
1
2
3
4
5, 6, 7
10, 9, 8
20 to 13
29 to 22
38 to 31
12, 30, 40
11, 21, 39, 41
Pad No.
/OE
PCLK
/SCLR
SCLK
D
D
Q
Q
Q
V
GND
CC
IN0
OUT0
20
10
00
to Q
to Q
to Q
, D
Pad Name
, D
IN1
27
17
07
OUT1
, D
IN2
, D
OUT2
MA007A Technical Summary
I/O
O
O
O
O
P
P
I
I
I
I
I
Output enable (active LOW)
Parallel register clock input
Serial register reset (active LOW)
Shift register clock input
Serial data input
Serial data output
Parallel data group 2 output
Parallel data group 1 output
Parallel data group 0 output
Positive supply voltage
Power ground (0 V)
together, the shift register will always be one clock
pulse ahead of the storage register. The shift
register has a serial input (D
standard output (D
provided with asynchronous reset (active LOW)
for all 8 stages shift register. The storage register
has 8 parallel 3-state bus driver outputs. Data in
the storage register appears at the output
whenever the output enable input (/OE) is LOW.
Description
OUTx
) for cascading. It is also
INx
MEGAWIN
) and a serial

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