G696 GMT [Global Mixed-mode Technology Inc], G696 Datasheet - Page 6

• Manufacturer Part Number: G696
• Description: Microprocessor Reset IC
• Manufacturer: GMT [Global Mixed-mode Technology Inc]

Pin Description
Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The G697L/G696L/G696H assert reset to
prevent
power-down, or brownout conditions. They assert a
reset signal whenever the V
below a preset threshold (V
time delay set by capacitor connected to C
V
(V
and the G696L/G696H have a push-pull output stage.
Connect a pull-up resistor on the G697L’s RESET out-
put to any supply between 0 and 5.5V.
The time delay is set by external capacitor C
internal pull up resistor R
pin exceeds the buffer threshold, typically 0.675 V
the RESET output high (RESET output low). The
voltage detector and buffer have built-in hysterisis to
prevent erratic reset operation. The formula of time
delay is T (ms) ≅ 1685 C
timing deagram and a Functional Block.
Figure3.
Ensuring a Valid Reset Output Down to V
When V
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since
most µP and other circuitry is inoperative with
below 0.8V. However, in applications where RESET
Ver: 1.1
Jul 26, 2002
PIN
CC
1
2
3
4
5
TH-
+V
has risen above the high reset threshold V
RESET
HYS
CC
RESET (G696H)
code-execution
RESET
). The G697L uses an open-drain output,
falls below 0.8V, the G696 RESET output
(G696L/G697L)
NAME
Global Mixed-mode Technology Inc.
GND
N.C.
V
C
G696
G696
CC
D
V
V
GND
GND
Valid to V
CC
CC
RESET
RESET
D
D
(µF). Fig1 and Fig2 show a
after V
RESET Output remains high while V
after V
Supply Voltage (+5V, +3.3V, +3.0V)
Ground
No Connection.
External Programmable time delay is set by the capacitor connect to C
RESET
errors
TH-
. When the voltage at C
CC
CC
), keeping it asserted for
= Ground Circuit
supply voltage declines
R1
R1
100k
100k
CC
CC
Output remains low while V
rises above the reset threshold.
rises above the reset threshold.
during
D
CC
power-up,
pin, after
= 0
D
, and
VCC
TH+
CC
D
,
6
CC
Figure 4. Interfacing to µPs with Bidirectional Reset
must be valid down to 0V, adding a pull-down resistor
to RESET causes any stray leakage currents to flow
to ground, holding RESET low (Figure 4). R1’s value
is not critical; 100kΩ is large enough not to load
A 100kΩ pull-up resistor to V
for the G697L if RESET is required to remain valid
for V
Figure 5. G697L Open-Drain
CC
RESET and small enough to pull RESET to ground.
is below the reset threshold, and for delay time set by C
is below the reset threshold, and for delay time set by C
V
V
CC
CC
CC
FUNCTION
< 0.8V.
I/O
Use with Multiple Supplies
G697
G697
+3.3V
+3.3V
+3.3V
+3.3V
G697
G697
GND
GND
V
V
V
V
GND
GND
V
V
CC
CC
CC
CC
CC
CC
RESET
RESET
RESET
RESET
G696/G697
D
R
R
R
R
pin.
PULL-UP
PULL-UP
PULL-UP
PULL-UP
CC
R
R
RESET
PULL-UP
PULL-UP
is also recommended
http://www.gmt.com.tw
RESET
RESET
RESET
RESET
INPUT
INPUT
INPUT
INPUT
TEL: [phone]
RESET
RESET
INPUT
INPUT
5V SYSTEM
5V SYSTEM
5V SYSTEM
5V SYSTEM
Output Allows
+5.0
+5.0V
+5.0
+5.0V
µP
µP
GND
GND
GND
GND
MOTOROLA
MOTOROLA
GND
GND
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
68HCXX
68HCXX
D
D