AX88172A ASIX [ASIX Electronics Corporation], AX88172A Datasheet - Page 14
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AX88172A
Manufacturer Part Number
AX88172A
Description
USB 2.0 to 10/100M Fast Ethernet Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
1.AX88172A.pdf
(45 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AX88172ATF
Manufacturer:
LATTICE
Quantity:
20
2.0 Signal Description
The following abbreviations apply to the following pin description table.
2.1 AX88772A 64-pin Pinout Description
Note: Every output or bi-directional I/O pin is 8mA driving strength.
I18
I3
I5
O3
O5
B5
AI
DP
DM
VBUS
XTL12P
XTL12N
RREF
EECK
EECS
EEDIO
XTL25P
XTL25N
RXIP
RXIN
TXOP
TXON
RSET_BG
LINK_LED
Pin Name
Input, 1.8V
Input, 3.3V
Input, 3.3V with 5V tolerant
Output, 3.3V
Output, 3.3V with 5V tolerant
Bi-directional I/O, 3.3V with 5V
tolerant
Analog Input
I5/PD/S
B5/PD/
B5/PD/
B5/PU/
Type
AB
AB
O3
AI
I3
T
T
T
O18
AB
AB
AB
AB
AO
I18
O5
Table 1
Pin No
57
56
48
51
52
55
35
36
37
62
63
20
4
5
7
8
1
USB 2.0 data positive pin.
USB 2.0 data negative pin.
VBUS pin input. Please connect to USB bus power.
12Mhz ±0.003%crystal or oscillator clock input. This clock is needed for
USB PHY transceiver to operate.
12Mhz crystal or oscillator clock output.
For USB PHY’s internal biasing. Please connect to analog GND through a
resistor (12.1Kohm ±1%).
EEPROM Clock. EECK is an output clock to EEPROM to provide timing
reference for the transfer of EECS, and EEDIO signals. EECK only drive
high / low when access EEPROM otherwise keep at tri-state and internal
pull-down.
EEPROM Chip Select. EECS is asserted high synchronously with respect to
rising edge of EECK as chip select signal. EECS only drive high / low when
access EEPROM otherwise keep at tri-state and internal pull-down.
EEPROM Data In. EEDIO is the serial output data to EEPROM’s data input
pin and is synchronous with respect to the rising edge of EECK. EEDIO
only drive high / low when access EEPROM otherwise keep at tri-state and
internal pull-up.
25Mhz ± 0.005% crystal or oscillator clock input. This clock is needed for
the embedded 10/100M Ethernet PHY to operate.
25Mhz crystal or oscillator clock output.
Receive data input positive pin for both 10BASE-T and 100BASE-TX.
Receive data input negative pin for both 10BASE-T and 100BASE-TX.
Transmit data output positive pin for both 10BASE-T and 100 BASE-TX
Transmit data output negative pin for both 10BASE-T and 100 BASE-TX
For Ethernet PHY’s internal biasing. Please connect to GND through a
12.1Kohm ±1% resistor.
Link status LED indicator. This pin drives low continuously when the
Ethernet link is up and drives low and high in turn (blinking) when Ethernet
PHY is in receiving or transmitting state.
: AX88772A 64-pin Pinout Description
Serial EEPROM Interface
Ethernet PHY Interface
USB 2.0 to 10/100M Fast Ethernet Controller
USB Interface
14
AO
AB
PU
PD
P
S
T
Pin Description
Analog Output
Analog Bi-directional I/O
Internal Pull Up (75K)
Internal Pull Down (75K)
Power Pin
Schmitt Trigger
Tri-stateable
ASIX ELECTRONICS CORPORATION
AX88772A/AX88172A
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