EM65568AF EMC [ELAN Microelectronics Corp], EM65568AF Datasheet - Page 23
EM65568AF
Manufacturer Part Number
EM65568AF
Description
130 COM/ 128 SEG 4096 Color STN LCD Driver
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
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7.2 Data write to Display RAM and Control Register
The data write to display RAM and Control Register use almost same procedure, only different setting of RS that select access
object.
In the case of the 80-family MPU, the data is written at the rising edge of WRB. In the case of the 68-family MPU, the data is
written at the falling edge of signal E.
Data write operation
7.3 Internal Register Read
In the case of display RAM read operation, need dummy read one time. The designated address data are not output to read
operation immediately after the address set to AX or AY register, but are output when the second data read. Dummy read is
always required one time after address set and write cycle.
* This specification is subject to be changed without notice.
RS = “L”: Display RAM data
RS = “H”: Control register data
Wrie to which
(D0~D15)
D0~D7
WRB
RS
Wrie to control register
Data0
Figure 6. Data write operation
Data1
130 COM/ 128 SEG 4096 Color STN LCD Driver
23
Data2
Data3
Wrie to display RAM
Data4
2005/3/8 (V1.2)
EM65568
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