EM65571AGH EMC [ELAN Microelectronics Corp], EM65571AGH Datasheet - Page 78

no-image

EM65571AGH

Manufacturer Part Number
EM65571AGH
Description
130COM / 128SEG 65K Color STN LCD Driver
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
EM65571
130COM/128SEG 65K Color STN LCD Driver
72 •
Various display controls are set up.
When the MPU accesses the display RAM, the X address and data can reverse. The REF
function is shown in the table below:
Note: maxH: The maximum X-address in each access mode.
The order of segment driver output can be reversed by the register, by register setting, thus
lessening the limitations in placing the IC during an LCD module assembly.
Example of exchanged bit order
8-bit Access (HSW=1)
REF
Internal Data
0
1
Write Data
Internal Data
Write Data
X Address
REF
NLIN
SWAP
The NLIN control n-line alternate driver.
NLIN = “0”: n-line alternate driver OFF. In each frame, the alternate signals (M)
NLIN =”1”: n-line alternate driver ON. Alternate is performed in accordance to
When data are written to the display RAM, the bit order of the written data are
SWAP = “0”: Normal mode
SWAP = “1”: In data writing, bit order is exchange.
Access from the MPU
NH
NH
D0 D1 D2 D3 D4 D5 D6
D0 D1 D2 D3 D4 D5 D6
d0 d1 d2 d3 d4 d5 d6
data set up in the n-line alternate register.
exchanged.
are reversed.
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6
d0 d1 d2 d3 d4 d5 d6
D7(MSB)
D7(MSB)
D0(LSB)
D0(LSB)
D7-D0
SWAP = 0
SWAP = 0
X Address
D7
D7
d7
MaxH-NH
D8 D9 D10 D11
D8 D9 D10 D11
d8 d9 d10 d11
NH
Internal Access
(This specification is subject to change without further notice)
D7
d7
D0 D1 D2 D3 D4 D5 D6
d7
Product Specification (V1.0) 08.04.2005
D7-D0
(MSB)
(MSB)
d6
(LSB)
(LSB)
D0 D1 D2 D3 D4 D5 D6
d11
d5
d10
SWAP = 1
d4
d9
d3
SEG(8*(maxH-NH)+7)Output
d8
SEG(8*(maxH-NH))Output
d2
d7
SEG(8*NH+7)Output
SWAP = 1
SEG(8*NH)Output
Segment Output
d6
Corresponding
d1
d5
D7
d0
D7
d4
D8 D9 D10 D11
d3
d2
d1
d0

Related parts for EM65571AGH