QL2007 ETC1 [List of Unclassifed Manufacturers], QL2007 Datasheet - Page 2

• Manufacturer Part Number: QL2007
• Description: 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

FEATURES
SUMMARY
PRODUCT
The QL2007 is a 7,000 usable ASIC gate, 11,000 usable PLD gate member
of the pASIC 2 family of FPGAs. pASIC 2 FPGAs employ a unique
combination of architecture, technology, and software tools to provide high
speed, high usable density, low price, and flexibility in the same devices.
The flexibility and speed make pASIC 2 devices an efficient and high
performance silicon solution for designs described using HDLs such as
Verilog and VHDL, as well as schematics.
The QL2007 contains 480 logic cells.
QL2007 is available in 84-pin PLCC, 144-pin TQFP, and 208-pin PQFP
packages.
Software support for the complete pASIC families, including the QL2007, is
available through three basic packages. The turnkey QuickWorks package
provides the most complete FPGA software solution from design entry to
logic synthesis (by Synplicity, Inc.), to place and route, to simulation. The
QuickTools
who use Cadence, Mentor, Synopsys, Viewlogic, Veribest, or other third-
party tools for design entry, synthesis, or simulation.
Total of 174 I/O Pins
Four Low-Skew (less than 0.5ns) Distributed Networks
High Performance
- 166 bidirectional input/output pins, PCI-compliant at 5.0V
- 4 high-drive input-only pins
- 4 high-drive input/distributed network pins
- Two array networks available to logic cell flip-flop clock, set, and
- Two global clock/control networks available to F1 logic input, and
- Input + logic cell + output delays under 6 ns
- Datapath speeds exceeding 225 MHz
- Counter speeds over 200 MHz
in -1/-2 speed grades
reset - each driven by an input-only pin
logic cell flip-flop clock, set, reset; input and I/O register clock, reset,
enable; and output enable controls - each driven by an input-only pin,
or any input or I/O pin, or any logic cell output or I/O cell feedback
TM
and QuickChip
3-26
TM
packages provide a solution for designers
With 174 maximum I/Os, the
QL2007