BC41B143AXX-IXB-E4 ETC1 [List of Unclassifed Manufacturers], BC41B143AXX-IXB-E4 Datasheet - Page 72
BC41B143AXX-IXB-E4
Manufacturer Part Number
BC41B143AXX-IXB-E4
Description
BlueCore 4-ROM CSP EDR Single Chip Bluetooth v2.0 + EDR System
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.BC41B143AXX-IXB-E4.pdf
(89 pages)
- Current page: 72 of 89
- Download datasheet (814Kb)
11.7.8 PCM Timing Information
Note:
BC41B143A-ds-002Pd
f
-
t
t
-
t
t
t
t
t
t
t
t
mclk
mclkh
mclkl
dmclksynch
dmclkpout
dmclklsyncl
dmclkhsyncl
dmclklpoutz
dmclkhpoutz
supinclkl
hpinclkl
Symbol
(1)
(1)
(1)
Assumes normal system clock operation. Figures will vary during low power modes, when system clock
speeds are reduced.
PCM_CLK frequency
PCM_SYNC frequency
PCM_CLK high
PCM_CLK low
PCM_CLK jitter
Delay time from PCM_CLK high to PCM_SYNC
high
Delay time from PCM_CLK high to valid PCM_OUT
Delay time from PCM_CLK low to PCM_SYNC low
(Long Frame Sync only)
Delay time from PCM_CLK high to PCM_SYNC low
Delay time from PCM_CLK low to PCM_OUT high
impedance
Delay time from PCM_CLK high to PCM_OUT high
impedance
Set-up time for PCM_IN valid to PCM_CLK low
Hold time for PCM_CLK low to PCM_IN invalid
This material is subject to CSR’s non-disclosure agreement
Parameter
Table 11.9: PCM Master Timing
© Cambridge Silicon Radio Limited 2005
4MHz DDS generation.
Selection of frequency is
programmable, see
Table 11.11
48MHz DDS generation.
Selection of frequency is
programmable, see
Table 11.12 and
Section 11.7.10
4MHz DDS generation
4MHz DDS generation
48MHz DDS generation
Production Information
Min
980
730
2.9
30
10
-
-
-
-
-
-
-
-
Device Terminal Descriptions
Typ
128
256
512
8
-
-
-
-
-
-
-
-
-
-
Max
21
20
20
20
20
20
20
-
-
-
-
-
Page 72 of 89
kHz
kHz
kHz
ns
ns
ns
ns
ns
ns
ns pk-pk
ns
ns
ns
ns
Unit
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