PAS5101CS PIXART [Pixart Imaging Inc.], PAS5101CS Datasheet

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PAS5101CS

Manufacturer Part Number
PAS5101CS
Description
CMOS 1.3MEGA DIGITAL IMAGE SESNSOR
Manufacturer
PIXART [Pixart Imaging Inc.]
Datasheet

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Part Number:
PAS5101CS
Quantity:
815
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission
PixArt Imaging Inc.
E-mail:
General Description
The PAS5101CS is a highly integrated CMOS active-pixel image sensor that has resolution of 1280( H ) x
1024 ( V ). To have an excellent image quality, the PAS5101CS output 10-bits RGB raw data though a
parallel data bus. It is available in 24-pin CSP.
The PAS5101CS can be programmed to set the exposure time for different luminance condition via I2C
serial control bus. By programming the internal register sets, it performs on-chip frame rate adjustment, offset
correction DAC, programmable gain control, 10-bits ADC, 10-bits output companding, interpolated sub-
sampling and defect compensation.
Features
PAS5101CS CMOS 1.3MEGA DIGITAL IMAGE SESNSOR
1.3Mega resolution, ~1/3” Lens.
Bayer RGB color filter array.
10-bits parallel RGB raw data output.
On-Chip 10-bits pipeline A/D converter.
On-Chip programmable gain amplifier
Digital gain stage.
Continuous variable frame time.
Continuous variable exposure time.
I2C
20mA power dissipation ( 15fps / 2.5v ).
< 10uA low power-down dissipation.
Window-of-Interest (WOI).
Sub-sampling.
Defect compensation.
Lens shading compensation.
Pin-to-pin compatible to OV9640.
fae_service@pixart.com.tw
TM
4-bits color gain amplifier.
4-bits global gain amplifier.
interface.
Key Specification
Supply Voltage
Resolution
Array Diagonal
Pixel Size
Max. Frame Rate
Max. System Clock
Max. Pixel Clock
Color Filter
Exposure Time
Scan Mode
Sensitivity
S/N Ratio
Chief Ray Angle
Package Type
PAS5101CS Specification
~ Frame time to Line time
1280 ( H ) x 1024 ( V )
5.9mm ( ~1/3” Optic )
~15 fps @ 1.3Mega
RGB Bayer Pattern
3.6μm x 3.6μm
Up to 48MHz
Up to 24MHz
Progressive
24-pin CSP
2.5v ~ 3.3v
20° ~ 24°
TBD
TBD
.
v1.0 2005/4/27
TM
1

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PAS5101CS Summary of contents

Page 1

... General Description The PAS5101CS is a highly integrated CMOS active-pixel image sensor that has resolution of 1280 1024 ( have an excellent image quality, the PAS5101CS output 10-bits RGB raw data though a parallel data bus available in 24-pin CSP. The PAS5101CS can be programmed to set the exposure time for different luminance condition via I2C serial control bus ...

Page 2

... Pin Assignment Figure 1.1 Shows the PAS5101CS pin diagram Pin No. Name E4 VSSA D4 VDDA E5 PWDN D5 VREF C5 VDDD B5 VSYNC A5 HSYNC B4 PXCLK A4 VDDQ B3 SYSCLK A3 RESET B2 VSSD A2 PX9 B1 PX8 A1 PX7 C1 PX6 D1 PX5 E1 PX4 D2 PX3 E2 PX2 C4 PX1 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc ...

Page 3

... LPF[7:0] = 1035, Nov_Size_By4[7:0] = 63, All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification OUT Digital data out. IN I2C clock. I/O I2C data. Internal pull high resister is 10KΩ. ...

Page 4

... Figure 2.4 Inter-frame timing @ Dark masked All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification Figure 2.3 Inter-frame timing . 4 v1.0 2005/4/27 ...

Page 5

... Block Diagram Figure 3.1 Shows the PAS5101CS sensor block diagram The PAS5101CS is a 1/3” CMOS imaging sensor with 1280 ( 1024 ( V ) physical pixels. The active region of sensor array is 1288 ( 1032 ( shown in Figure 3.1. The sensor array is cover with Bayer pattern color filters and μ-lens. The first pixel location ( 0 programmable in 2 direction ( X and Y ) and the default value is at the left-down side of sensor array ...

Page 6

... HardwareReset : Pull Reset pin to high to reset the full chip. 3.6. Window-of-Interest ( WOI ) Users are allowed to define window size as well as window location in PAS5101CS. The location of window can be anywhere in the pixel array. Window size and window location is defined by register “H_Start”, “V_Start”, “V_Size” and “H_Size”; The “H_Start” defines the starting column while “ ...

Page 7

... H_Start[9: V_Start[8: LPF[7:0] = 483, Nov_Size_By4[7:0] = 63, All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification Figure 3.3 H_Size[9:0] = 639, Figure 3.4 Inter-line timing of W.O.I Figure 3.5 Inter-frame timing of W.O.I V_Size[8:0]= 483 ...

Page 8

... Sub-Sampling PAS5101CS can be programmed to output image in VGA、 QVGA and QQVGA size. In the VGA sub- sampling mode, both vertical and horizontal pixels are sub-sampling at 1/2; In QVGA sub-sampling mode, both vertical and horizontal pixels are sub-sampling at 1/4; While in QQVGA sub-sampling mode, sub- sampling at 1/8. By programming Skip_Analog and Skip_Digital, The maximum sub-sampling rate is 1/32 ( Skip_Analog + Skip_Digital ) ...

Page 9

... Valid line = ( V_Siez + Skip_Digital = ( 1035 + 518 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification Figure 3.8 Inter-frame timing of W.O.I H_Size[9:0] = 1287, Figure 3.9 Inter-line timing Figure 3.10 Inter-frame timing V_Size[8:0]= 1035, ...

Page 10

... I2C Bus PAS5101CS supports I2C bus transfer protocol and is acting as slave device. The 7 bits unique slave address is “1000000” and supports receiving / transmitting speed up to 400KHz. 4.1. I2C Bus Overview Only two wires SDA ( serial data ) and SCL ( serial clock ) carry information between the devices connected to the I2C bus ...

Page 11

... PAS5101CS register description ) During write cycle, the master generates start condition and then places the 1 combined slave address ( 7 bits ) with a read / write control bit to SDA line. After slave ( PAS5101CS ) issues acknowledgment, the master places 2 PAS5101CS acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS5101CS control register ( address was assigned by 2 can generate a stop condition to end of this write cycle ...

Page 12

... PAS5101CS place the next 8 bits data ( address is increment automatically ) on SDA line and then transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read longer generated by master but instead by keep SDA line high. The slave ( PAS5101CS ) must releases SDA line to master to generate STOP condition. ...

Page 13

... Noise margin at HIGH level for each connected device. ( including hysteresis ) Note : It depends on the “high” period time of SCL. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification t 0 3.45 HD;DAT t 250 - SU ...

Page 14

... Type : OUT & I/O for PXCLK, H/VSYNC & SDA, load 10pF, 1.2KΩ, 2. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification V DDD V DDA V DDQ Parameter Type : POWER DC supply voltage – ...

Page 15

... Signal to Noise Ratio Dynamic Range Temperature Range All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification Parameter Master clock frequency Operation Stable Image Min. Typ. ...

Page 16

... Reference Circuit Schematic 24/SM FLEX AGND VDDA RESET PWDN SYSCLK PXCLK All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification CONN VSSA E4 VDDA D4 RESET A3 PWDN E5 SYSCLK B3 PXCLK ...

Page 17

... Package Information 1107 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: 800 281.4 2426 5445 PAS5101CS Specification 800 415 160 640 . v1.0 2005/4/27 17 ...

Page 18

... Reflow Profile for Non Lead-Free All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification . v1.0 2005/4/27 18 ...

Page 19

... Lens & Holder 9.1. LarGan 40-900L 9.2. LarGan 40-519C 9.3. MaxEmil SS-4828GA 9.4. 久禾 PEH-0116-03AA All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission PixArt Imaging Inc. fae_service@pixart.com.tw E-mail: PAS5101CS Specification . v1.0 2005/4/27 19 ...

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