AT45DB081B-CNU SL383 Atmel, AT45DB081B-CNU SL383 Datasheet - Page 15
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AT45DB081B-CNU SL383
Manufacturer Part Number
AT45DB081B-CNU SL383
Description
Manufacturer
Atmel
Datasheet
1.AT45DB081B-CNU_SL383.pdf
(33 pages)
- Current page: 15 of 33
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Reset Timing (Inactive Clock Polarity Low Shown)
Note:
Command Sequence for Read/Write Operations (except Status Register Read)
Notes:
2225J–DFLSH–2/08
The CS signal should be in the high state before the RESET signal is deasserted.
1. “r” designates bits reserved for larger densities.
2. It is recommended that “r” be a logical “0” for densities of 8M bits or smaller.
3. For densities larger than 8M bits, the “r” bits become the most significant Page Address bit for the appropriate density.
RESET
SCK
SO
CS
SI
MSB
larger densities
HIGH IMPEDANCE
Reserved for
SI
r r r X X X X X
CMD
Page Address
(PA11-PA0)
X X X X
8 bits
X X X X
8 bits
(BA8-BA0/BFA8-BFA0)
Byte/Buffer Address
X X X X X X X X
8 bits
t
RST
t
REC
HIGH IMPEDANCE
LSB
AT45DB081B
t
CSS
15
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