LFXP10C-5F388CES Lattice Semiconductor, LFXP10C-5F388CES Datasheet - Page 52

• Manufacturer Part Number: LFXP10C-5F388CES
• Description: Semiconductors and Actives, gate, Programmable Logic (FPGAs, PALs, CPLDs ...), programmable
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
EBR Memory Timing Diagrams
Figure 3-8. Read Mode (Normal)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive of the clock.
Figure 3-9. Read Mode with Input and Output Registers
CLKA
(Registered)
WEA
ADA
DOA
CSA
DIA
CLKA
WEA
ADA
DOA
CSA
DOA
DIA
t
SU
D0
A0
Mem(n) data from previous read
t
t
H
SU
A0
D0
t
H
Mem(n) data from previous read
D1
A1
D1
A1
DOA
3-21
output is only updated during a read cycle
A0
A0
t
ACCESS
DC and Switching Characteristics
D0
A1
D0
A1
t
ACCESS
LatticeXP Family Data Sheet
D0
D1
D1
A0
A0
t
ACCESS
t
ACCESS
D1
D0
D0